Automatic modeling of switch-level networks using partial orders [MOS circuits]

It is shown how the substitution of a partial order facilitates automatic modeling in switch-level simulators that use the traditional total ordering of strengths for resolving conflicts between opposing signals while increasing the accuracy of that model. Minimization techniques are described that reduce the number of required modeling strengths to acceptable levels. As a result, the use of partially ordered strengths does not significantly degrade simulation performance. It is also shown how to rearrange the computations performed during switch-level simulation to yield a nearly twofold increase in speed for good circuit simulation. A switch-level simulator using this algorithm with partially ordered strengths has been successfully used to verify several full-custom industrial designs. >