A Low-Power High-PSRR CMOS Voltage Reference with Active-Feedback Frequency Compensation for IoT Applications

A low-power CMOS voltage reference with active-feedback frequency compensation is proposed for power-constrained IoT applications whereby power supply ripple rejection (PSRR) performance is critical for the survival of the devices. The proposed voltage reference consists of MOS transistors operating in the sub-threshold region to allow for low-voltage and low-power operations. An active-feedback frequency compensation technique has been used to make the loop stable and improve the PSRR with a very small compensation capacitor while allowing a relatively large output capacitor. The circuit is fabricated in a standard 0.18-μm CMOS process. The measured power consumption is 22nW at 0.7V power supply. The measured temperature coefficient (TC) is 38ppm/°C in a range from −40 to +110°C, and the line regulation is 200μV/V in a supply voltage range of 0.7∼2V. The measured PSRR at 10 Hz, 1 kHz, and 100 kHz is −64dB, −56dB, and −52dB, respectively. The active chip area is 0.04mm2.

[1]  Byungsub Kim,et al.  5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[2]  Zekun Zhou,et al.  An All-MOSFET Sub-1-V Voltage Reference With a —51 –dB PSR up to 60 MHz , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Byungsub Kim,et al.  5.7 A 29nW bandgap reference circuit , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[4]  Danny Wen-Yaw Chung,et al.  A Wide-Range and High PSRR CMOS Voltage Reference for Implantable Device , 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

[5]  B.K. Ahuja,et al.  An improved frequency compensation technique for CMOS operational amplifiers , 1983, IEEE Journal of Solid-State Circuits.

[6]  G. Iannaccone,et al.  A Sub-1 V, 10 ppm/°C, Nanopower Voltage Reference Generator , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

[7]  Krishnaswamy Nagaraj,et al.  A low supply voltage high PSRR voltage reference in CMOS process , 1995, IEEE J. Solid State Circuits.

[8]  G. Palumbo,et al.  A low-voltage low-power voltage reference based on subthreshold MOSFETs , 2003, IEEE J. Solid State Circuits.

[9]  Y. Amemiya,et al.  A 300 nW, 15 ppm/$^{\circ}$C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs , 2009, IEEE Journal of Solid-State Circuits.

[10]  SeongHwan Cho,et al.  A 0.8V, 37nW, 42ppm/°C sub-bandgap voltage reference with PSRR of −81dB and line sensitivity of 51ppm/V in 0.18um CMOS , 2017, 2017 Symposium on VLSI Circuits.

[11]  Giuseppe de Vita,et al.  A Sub-1-V, 10 ppm/ $^{\circ}$C, Nanopower Voltage Reference Generator , 2007, IEEE Journal of Solid-State Circuits.

[12]  Chenchang Zhan,et al.  An Ultralow Power Subthreshold CMOS Voltage Reference Without Requiring Resistors or BJTs , 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.