Controlled Degradation Stochastic Resonance in Adaptive Averaging Cell-Based Architectures
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[1] A. Rubio,et al. An Analysis of Internal Parameter Variations Effects on Nanoscaled Gates , 2008, IEEE Transactions on Nanotechnology.
[2] A. Asenov,et al. Statistical Simulation of Progressive NBTI Degradation in a 45-nm Technology pMOSFET , 2010, IEEE Transactions on Electron Devices.
[3] Algirdas Avizienis,et al. Reliability analysis and architecture of a hybrid-redundant digital system: generalized triple modular redundancy with self-repair , 1970, AFIPS '70 (Spring).
[4] Shekhar Y. Borkar,et al. Electronics beyond nano-scale CMOS , 2006, 2006 43rd ACM/IEEE Design Automation Conference.
[5] S. Goldstein,et al. Scalable Defect Tolerance for Molecular Electronics , 2002 .
[6] S. Cotofana,et al. Degradation Stochastic Resonance (DSR) in AD-AVG architectures , 2012, 2012 12th IEEE International Conference on Nanotechnology (IEEE-NANO).
[7] Shekhar Y. Borkar,et al. Designing reliable systems from unreliable components: the challenges of transistor variability and degradation , 2005, IEEE Micro.
[8] C. Dekker. Solid-state nanopores. , 2007, Nature nanotechnology.
[9] Y. Leblebici,et al. Optimization of the Averaging Reliability Technique Using Low Redundancy Factors for Nanoscale Technologies , 2009, IEEE Transactions on Nanotechnology.
[10] A. Rubio,et al. Adaptive Fault-Tolerant Architecture for Unreliable Technologies With Heterogeneous Variability , 2012, IEEE Transactions on Nanotechnology.
[11] James Tschanz,et al. Parameter variations and impact on circuits and microarchitecture , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[12] O. Oliaei. Stochastic resonance in sigma-delta modulators , 2003 .
[13] N. Stocks,et al. Suprathreshold stochastic resonance in multilevel threshold systems , 2000, Physical review letters.
[14] Y. Leblebici,et al. Optimization of nanoelectronic systems' reliability under massive defect density using cascaded R-fold modular redundancy. , 2008, Nanotechnology.
[15] Thinh P. Nguyen. Robust Data-Optimized Stochastic Analog-to-Digital Converters , 2007, IEEE Trans. Signal Process..
[16] Yusuf Leblebici,et al. Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR) , 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.
[17] R. Mcintyre. Multiplication noise in uniform avalanche diodes , 1966 .
[18] A. Rubio,et al. Defect and fault tolerant cell architecture for feasible nanoelectronic designs , 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..
[19] F. Martorell,et al. Fault tolerant structures for nanoscale gates , 2007, 2007 7th IEEE Conference on Nanotechnology (IEEE NANO).
[20] Yusuf Leblebici,et al. Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors , 2003, 2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003..