Workshops on Extreme Scale Design Automation (ESDA) Challenges and Opportunities for 2025 and Beyond

Integrated circuits and electronic systems, as well as design technologies, are evolving at a great rate -- both quantitatively and qualitatively. Major developments include new interconnects and switching devices with atomic-scale uncertainty, the depth and scale of on-chip integration, electronic system-level integration, the increasing significance of software, as well as more effective means of design entry, compilation, algorithmic optimization, numerical simulation, pre- and post-silicon design validation, and chip test. Application targets and key markets are also shifting substantially from desktop CPUs to mobile platforms to an Internet-of-Things infrastructure. In light of these changes in electronic design contexts and given EDA's significant dependence on such context, the EDA community must adapt to these changes and focus on the opportunities for research and commercial success. The CCC workshop series on Extreme-Scale Design Automation, organized with the support of ACM SIGDA, studied challenges faced by the EDA community as well as new and exciting opportunities currently available. This document represents a summary of the findings from these meetings.

[1]  G.E. Moore,et al.  Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.

[2]  Ryuhei Hatsuse,et al.  The State in the Future , 1998 .

[3]  Shekhar Y. Borkar,et al.  Designing reliable systems from unreliable components: the challenges of transistor variability and degradation , 2005, IEEE Micro.

[4]  Natarajan Viswanathan,et al.  ICCAD-2013 CAD contest in placement finishing and benchmark suite , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[5]  John Watrous,et al.  On one-dimensional quantum cellular automata , 1995, Proceedings of IEEE 36th Annual Foundations of Computer Science.

[6]  Lynn Conway,et al.  Introduction to VLSI systems , 1978 .

[7]  Robert K. Brayton,et al.  NSF Workshop on EDA: Past, Present, and Future (Part 1) , 2010, IEEE Des. Test Comput..

[8]  Jason Cong,et al.  Customizable Domain-Specific Computing , 2009, IEEE Design & Test of Computers.

[9]  Vinton G. Cerf Heidelberg Laureate Forum , 2013, CACM.

[10]  Luiz André Barroso,et al.  The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines , 2009, The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines.

[11]  Leon Stok The Next 25 Years in EDA: A Cloudy Future? , 2014, IEEE Des. Test.

[12]  Steven M. Burns,et al.  An improved benchmark suite for the ISPD-2013 discrete cell sizing contest , 2013, ISPD '13.

[13]  Kate Cummings,et al.  Introduction to the Theory , 2015 .

[14]  Alex K. Jones,et al.  “Scaling” the impact of EDA education Preliminary findings from the CCC workshop series on extreme scale design automation , 2013, 2013 IEEE International Conference on Microelectronic Systems Education (MSE).

[15]  Randal E. Bryant,et al.  Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.

[16]  Rob A. Rutenbar DAC at 50: The Second 25 Years , 2014, IEEE Des. Test.

[17]  R.H. Dennard,et al.  Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions , 1974, Proceedings of the IEEE.

[18]  Aart J. de Geus The Greatest "Tech-Onomic Push-Pull" in Human History , 2014, IEEE Des. Test.

[19]  Eitan M. Gurari,et al.  Introduction to the theory of computation , 1989 .

[20]  Robert K. Brayton,et al.  NSF Workshop on EDA: Past, Present, and Future (Part 2) , 2010, IEEE Design & Test of Computers.

[21]  W G Parks,et al.  Gordon Research Conference. , 1963, Science.

[22]  Mika Laiho,et al.  Stateful implication logic with memristors , 2009, 2009 IEEE/ACM International Symposium on Nanoscale Architectures.

[23]  Ismail Bustany,et al.  ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement , 2014, ISPD '14.

[24]  Gregg Lowe Driving the Internet of Things , 2014, IEEE Des. Test.

[25]  Kunle Olukotun,et al.  Workshop on Advancing Computer Architecture Research ( ACAR-1 ) Failure is not an Option : Popular Parallel Programming , 2010 .