A Study on the Loop Behavior of Embedded Programs

Software executing on a microprocessor contributes to much of the overall power and performance of an embedded system. A general rule-of-thumb for the behavior of both desktop and embedded systems has been that most execution time is spent in a small fraction of the software. We studied the behavior of 16 embedded system programs from the Powerstone benchmarks, with a focus specifically on those programs’ loop behavior. We examined such behavior for a popular 32-bit embedded microprocessor (MIPS) as well as a popular 8-bit mmicroprocessor (8051).

[1]  Sujit Dey,et al.  Common-case computation: a high-level technique for power and performance optimization , 1999, DAC '99.

[2]  R. Govindarajan,et al.  Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[3]  Martin C. Rinard,et al.  Dynamic feedback: an effective technique for adaptive computing , 1997, PLDI '97.

[4]  Ibrahim N. Hajj,et al.  Energy and performance improvements in microprocessor design using a loop cache , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

[5]  Antonio González,et al.  Control speculation in multithreaded processors through dynamic loop detection , 1998, Proceedings 1998 Fourth International Symposium on High-Performance Computer Architecture.

[6]  Benjamin Bishop,et al.  A detailed analysis of MediaBench , 1999, 1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461).

[7]  J. A. Fisher,et al.  Customized instruction-sets for embedded processors , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

[8]  Hiroto Yasuura,et al.  A power reduction technique with object code merging for application specific embedded processors , 2000, DATE '00.

[9]  B. Moyer,et al.  Instruction fetch energy reduction using loop caches for embedded applications with small tight loops , 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).

[10]  Bill Moyer,et al.  A low power unified cache architecture providing power and performance flexibility , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[11]  Christopher W. Fraser,et al.  A Retargetable C Compiler: Design and Implementation , 1995 .

[12]  Makoto Kobayashi.  Dynamic Characteristics of Loops , 1984, IEEE Transactions on Computers.

[13]  Frank Vahid,et al.  A self-optimizing embedded microprocessor using a loop table for low power , 2001, ISLPED '01.

[14]  Jianwen Zhu,et al.  Specification and Design of Embedded Systems , 1998, Informationstechnik Tech. Inform..

[15]  Jack W. Davidson,et al.  Profile guided code positioning , 1990, SIGP.

[16]  Steven S. Muchnick,et al.  Advanced Compiler Design and Implementation , 1997 .

[17]  Luca Benini,et al.  Automatic source code specialization for energy reduction , 2001, ISLPED '01.

[18]  Jörg Henkel.  A low power hardware/software partitioning approach for core-based embedded systems , 1999, DAC '99.