In order to realize a cost-effective high density FRAM product over 64-Mb, it is inevitable to develop technologies for a small cell and large wafer size without degradation during full integration. We have successfully demonstrated a fully functional 0.16 mum2 capacitor size, 64-Mb, 1T1C FRAM on an 8-inch wafer by introducing new integration technologies at 150 nm technology node. One of the key technologies is the use of novel capping layer, i.e. Al2O3, which prevents the capacitor from the degradation caused by following integration process. It was found that novel capping Al2O3 layer was very effective to block chronic hydrogen diffusion, and depending on the wafer size, the effective capping layer condition is changed. By introducing a novel capping layer of Al2O3 and optimizing its process conditions, the fully integrated ferroelectric capacitor for the 150 nm, 64-Mb, 1T1C FRAM on the 8-inch Si-substrate shows good ferroelectric properties such as a polarization value of 33 muC/cm2 with an uniform distribution of sigma = 1.27, and the sensing window of 300 mV at 85degC.