Liveness Analysis in Explicitly-Parallel Programs

In this report, we revisit scalar and array element-wise liveness analysis for programs with parallel specifications. In earlier work on memory allocation/contraction (register allocation or intra- and inter-array reuse in the polyhedral model), a notion of ``time'' or a total order among the iteration points was used to compute the liveness of values. In general, the execution of parallel programs is not a total order, and hence the notion of time is not applicable. We first revise how conflicts are computed by using ideas from liveness analysis for register allocation, studying the structure of the corresponding conflict/interference graphs. Instead of considering the conflict between two live ranges, we only consider the conflict between a live range and a write. This simplifies the formulation from having four instances involved in the test down to three, and also improves the precision of the analysis in the general case. Then we extend the liveness analysis to work with partial orders so that it can be applied to many different parallel languages/specifications with different forms of parallelism. An important result is that the complement of the conflict graph with partial orders is directly connected to memory reuse, even in presence of races. However, programs with conditionals do not always define a partial order, and our next step will be to handle such cases with more accuracy.

[1]  Alain Darte,et al.  Bee+Cl@k: an implementation of lattice-based array contraction in the source-to-source translator rose , 2007, LCTES '07.

[2]  Alessandro Cilardo,et al.  Improving Multibank Memory Access Parallelism with Lattice-Based Partitioning , 2015, ACM Trans. Archit. Code Optim..

[3]  Sanjay V. Rajopadhye,et al.  Memory Reuse Analysis in the Polyhedral Model , 1996, Euro-Par, Vol. I.

[4]  Gilles Villard,et al.  Lattice-based memory allocation , 2003, IEEE Transactions on Computers.

[5]  Sanjay V. Rajopadhye,et al.  Optimizing memory usage in the polyhedral model , 2000, TOPL.

[6]  Hugo De Man,et al.  Memory Size Reduction Through Storage Order Optimization for Embedded Parallel Multimedia Applications , 1997, Parallel Comput..

[7]  Paul Feautrier,et al.  Some efficient solutions to the affine scheduling problem. Part II. Multidimensional time , 1992, International Journal of Parallel Programming.

[8]  Sven Verdoolaege.  Counting Affine Calculator and Applications , 2011 .

[9]  Frédéric Vivien,et al.  A step towards unifying schedule and storage optimization , 2007, TOPL.

[10]  Albert Cohen,et al.  Storage Mapping Optimization for Parallel Programs , 1999, Euro-Par.

[11]  Paul Feautrier,et al.  Automatic Storage Management for Parallel Programs , 1998, Parallel Comput..

[12]  Rajiv Gupta,et al.  URSA: A Unified ReSource Allocator for Registers and Functional Units in VLIW Architectures , 1993, Architectures and Compilation Techniques for Fine and Medium Grain Parallelism.

[13]  Tomofumi Yuki,et al.  Array dataflow analysis for polyhedral X10 programs , 2013, PPoPP '13.

[14]  P. Feautrier.  Parametric integer programming , 1988 .

[15]  Larry Carter,et al.  Schedule-independent storage mapping for loops , 1998, ASPLOS VIII.

[16]  Vincent Loechner,et al.  Counting Integer Points in Parametric Polytopes Using Barvinok's Rational Functions , 2007, Algorithmica.

[17]  Albert Cohen.  Program Analysis and Transformation: From the Polytope Model to Formal Languages. (Analyse et transformation de programmes: du modèle polyédrique aux langages formels) , 1999 .

[18]  Tomofumi Yuki.  Memory Allocations for Tiled Uniform Dependence Programs , 2013 .

[19]  Sven Verdoolaege,et al.  isl: An Integer Set Library for the Polyhedral Model , 2010, ICMS.

[20]  Alain Darte,et al.  Exact and Approximated Data-Reuse Optimizations for Tiling with Parametric Sizes , 2015, CC.

[21]  Sid Ahmed Ali Touati,et al.  Register Saturation in Instruction Level Parallelism , 2005, International Journal of Parallel Programming.

[22]  Fabrice Rastello,et al.  Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How , 2006, LCPC.