Positive feedback technique and split-length transistors for DC-gain enhancement of two-stage op-amps

This study presents the design and simulation of a fully differential two-stage op-amp in a 0.18 μm complementary metal-oxide-semiconductor process with a 1.8 V supply voltage. In this op-amp, positive feedback technique and split-length transistors (SLTs) are employed to increase the DC-gain of the op-amp by about 22 dB without affecting the unity-gain bandwidth (UGBW), stability, power dissipation and output voltage swing of the conventional two-stage op-amp. A comprehensive analysis is provided for differential-mode gain, common-mode gain, power supply rejection ratio, input-referred noise, input offset, frequency response and the effect of using SLTs on DC-gain sensitivity. The proposed op-amp is utilised in a flip-around sample-and-hold amplifier (SHA). The output spectrum of the SHA shows the total harmonic distortion of 0.0023%. The post-layout and Monte Carlo simulation results show that the proposed op-amp has better performance than the state-of-the-art designs.

[1]  Hossein Shamsi,et al.  On the design of a low-voltage two-stage OTA using bulk-driven and positive feedback techniques , 2012 .

[2]  Dejan S. Filipovic,et al.  Bi-layer, mode 2, four-arm spiral antennas , 2007 .

[3]  A. Garimella,et al.  Low dropout (LDO) voltage regulator design using split-length compensation , 2012, 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS).

[4]  Fujiang Lin,et al.  A Multibit Delta–Sigma Modulator With Double Noise-Shaped Segmentation , 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

[5]  George Raikos,et al.  Low‐voltage bulk‐driven input stage with improved transconductance , 2011, Int. J. Circuit Theory Appl..

[6]  Luis H. C. Ferreira,et al.  A 60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process , 2014, IEEE Trans. Circuits Syst. I Regul. Pap..

[7]  Kong-Pang Pun,et al.  Reversed nested Miller compensation with voltage buffer and nulling resistor , 2003, IEEE J. Solid State Circuits.

[8]  Hossein Shamsi,et al.  A new two-stage Op-Amp using hybrid cascode compensation, bulk-driven, and positive feedback techniques , 2010, Proceedings of the 8th IEEE International NEWCAS Conference 2010.

[9]  Hossein Shamsi,et al.  Positive feedback technique for DC-gain enhancement of folded cascode Op-Amps , 2012, 10th IEEE International NEWCAS Conference.

[10]  Gaetano Palumbo,et al.  Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

[11]  Abdollah Khoei,et al.  Design of a New Folded Cascode Op-Amp Using Positive Feedback and Bulk Amplification , 2007, IEICE Trans. Electron..

[12]  Meysam Akbari,et al.  Enhancing transconductance of ultra-low-power two-stage folded cascode OTA , 2014 .

[13]  José Silva-Martínez,et al.  The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier , 2009, IEEE Journal of Solid-State Circuits.

[14]  K. V. Noren,et al.  Gain-enhancement differential amplifier using positive feedback , 2012, 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS).

[15]  Bibhudatta Sahoo,et al.  Thermal-Noise-Canceling Switched-Capacitor Circuit , 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

[16]  Fabian Khateb,et al.  Bulk-driven adaptively biased OTA in 0.18 μm CMOS , 2015 .

[17]  Syed Kamrul Islam,et al.  Low-Voltage Bulk-Driven Operational Amplifier With Improved Transconductance , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[18]  Vishal Saxena,et al.  Indirect compensation techniques for three-stage fully-differential op-amps , 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

[19]  Robson L. Moreno,et al.  An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[20]  Marius Neag,et al.  Comparative Analysis of Simulation-Based Methods for Deriving the Phase- and Gain-Margins of Feedback Circuits With Op-Amps , 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

[21]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[22]  Hae-Seung Lee,et al.  A high-swing CMOS telescopic operational amplifier , 1998 .

[23]  Gaetano Palumbo,et al.  Advances in Reversed Nested Miller Compensation , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

[24]  Mohammad Yavari Hybrid Cascode Compensation for Two-Stage CMOS Opamps , 2005, IEICE Trans. Electron..

[25]  Jose Silva-Martinez,et al.  Enhancing general performance of folded cascode amplifier by recycling current , 2007 .

[26]  Gaetano Palumbo,et al.  Low-Power Class-AB CMOS Voltage Feedback Current Operational Amplifier With Tunable Gain and Bandwidth , 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

[27]  Young-Kyun Cho,et al.  Single op-amp second-order loop filter for continuous-time delta–sigma modulators , 2015 .

[28]  G. Geelen,et al.  A fast-settling CMOS op amp for SC circuits with 90-dB DC gain , 1990 .

[29]  Ponnathpur R. Mukund,et al.  Positive feedback for gain enhancement in sub-100 nm multi-GHz CMOS amplifier design , 2015, Int. J. Circuit Theory Appl..

[30]  Jun Xu,et al.  Low-voltage process-insensitive frequency compensation method for two-stage OTA with enhanced DC gain , 2015 .