From substrate to VLSI: investigation of hardened SIMOX without epitaxy, for dose, dose rate and SEU phenomena

A silicon-on-insulator (SOI) technology with a hardened variant is presented, focusing on some of the weak points that could impede the progress of SOI toward the production of high-speed hardened VLSI. The devices described here use the LOCOS isolation method instead of the commonly used MESA and a thin active silicon layer on which no epitaxy takes place. Dose and dose rate tests were performed on both technologies and on various circuits and special-purpose devices. An analysis of the sensitivity of the circuits to single-event upset, (SEU) was made, and a hardness limitation coming from an ion-induced transient caused by substrate-related phenomena was found. Dose, dose rate, and SEU behavior are related to the structural characteristics mentioned above. >