Practical Implementation of a Low-Power Content-Addressable Memory

This paper presents a practical implementation of a CAM oriented to low-power applications. This implementation takes into account every architectural module integrating the CAM system, as well as the relations among them that allow the minimization of the energy dissipation. This work has followed the complete design process in order to optimize the implementation results in terms of power consumption, and avoiding the performance penalty of previous approaches which did not consider the whole system.

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