RF CMOS fully-integrated heterodyne front-end receivers design technique for 5 GHz applications

This paper presents an architecture that allows the implementation of fully integrated heterodyne 5GHz RF receivers. The front-end circuitry consists of a low noise amplifier, a critical cascade of two notch filters, an active mixer, and a voltage controlled oscillator. The notch filters, which use on chip inductor Q-factor enhancement techniques, are designed to provide a wide bandwidth of image rejection (IR), eliminating the need for accurate IR tuning circuitry. More than 40dB of image rejection can be obtained in a standard 0.18/spl mu/m CMOS technology, for a 400MHz bandwidth centered at 7.2GHz, without having to resort to the overhead and the complexity of automatic tuning circuits. Design issues of homodyne and heterodyne 5GHz front-end receivers are received and discussed.

[1]  Sorin P. Voinigescu,et al.  5-GHz SiGe HBT monolithic radio transceiver with tunable filtering , 1999, RFIC 1999.

[2]  B. Razavi,et al.  A 5.2-GHz CMOS receiver with 62-dB image rejection , 2000, 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103).

[3]  Calvin Plett,et al.  A 5 GHz radio front-end with automatically Q tuned notch filter , 2002, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting.

[4]  J.R. Long,et al.  A low-voltage 5.1-5.8-GHz image-reject downconverter RF IC , 2000, IEEE Journal of Solid-State Circuits.

[5]  M.N. El-Gamal,et al.  A high figure of merit and area-efficient low-voltage (0.7-1 V) 12 GHz CMOS VCO , 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

[6]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[7]  H.R. Rategh,et al.  A 5-GHz CMOS wireless LAN receiver front end , 2000, IEEE Journal of Solid-State Circuits.

[8]  R.A. Baki,et al.  A 1.5V multigigahertz CMOS tunable image reject notch filter , 2002, The 14th International Conference on Microelectronics,.