Progress in high-speed and high-resolution CMOS data converters☆

This paper presents an overview of the status of high-speed and high-resolution CMOS data converters. Techniques and achieved performance are compared using power consumption per step of resolution as a key parameter. The effort in optimizing this quality factor is evident, because of urgency of portable system requirements. Trends towards low-power design and bit-stream processing are also considered.

[1]  P. Senn,et al.  A 130 MHz 8-Bit CMOS Video DAC for HDTV Applications , 1990, ESSCIRC '90: Sixteenth European Solid-State Circuits Conference.

[2]  Guido Torelli,et al.  An 8-bit two-step flash A/D converter for video applications , 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

[3]  Henk Termeer,et al.  A 10-b 40-MHz 0.8- mu m CMOS current-output D/A converter , 1991 .

[4]  Chung-Yu Wu,et al.  A 10-b 125-MHz CMOS digital-to-analog converter (DAC) with threshold-voltage compensated current sources , 1994, IEEE J. Solid State Circuits.

[5]  Paul R. Gray,et al.  A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter , 1988 .

[6]  Paul Jespers,et al.  A 10-bit pipelined switched-current A/D converter , 1994 .

[7]  I. Dedic,et al.  A sixth-order triple-loop sigma-delta CMOS ADC with 90 dB SNR and 100 kHz bandwidth , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[8]  Masao Nakaya,et al.  An 8-bit high-speed CMOS A/D converter , 1986 .

[9]  Feng Chen,et al.  A High Resolution Multibit Sigma-Delta Modulator with Individual Level Averaging(Special Issue on the 1994 VLSI Circuits Symposium) , 1995 .

[10]  Paul R. Gray,et al.  A 10 b, 20 Msample/s, 35 mW pipeline A/D converter , 1995, IEEE J. Solid State Circuits.

[11]  R.J. Killips,et al.  An Inherently Monotonic 7 Bit CMOS ADC for Video Applications , 1986, ESSCIRC '85: 11th European Solid-State Circuits Conference.

[12]  Hae-Seung Lee.  A 12-b 600 ks/s digitally self-calibrated pipelined algorithmic ADC , 1994 .

[13]  M.J.M. Pelgrom.  A 10-b 50-MHz CMOS D/A converter with 75- Omega buffer , 1990 .

[14]  Guido Torelli,et al.  Active compensation of parasitic capacitances in a 10 bit 50 MHz CMOS D/A converter , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[15]  Henk Termeer,et al.  An Oversampled Multi-bit CMOS D/A Converter For Digital Audio With 115dB Dynamic Range , 1991 .

[16]  Randall L. Geiger,et al.  An architecture and an algorithm for fully digital correction of monolithic pipelined ADCs , 1995 .

[17]  Franco Maloberti,et al.  Self-calibration in high speed current steering CMOS D/A converters , 1994 .

[18]  Masao Nakaya,et al.  An 80-MHz 8-bit CMOS D/A converter , 1986 .

[19]  T. Saramaki,et al.  Multiplier-free decimator algorithms for superresolution oversampled converters , 1990, IEEE International Symposium on Circuits and Systems.

[20]  Franco Maloberti,et al.  A 100-MHz CMOS DAC for video-graphic systems , 1989 .

[21]  A. Barlow,et al.  A low power 20 bit instrumentation delta-sigma ADC , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[22]  Franco Maloberti,et al.  TOSCA: a simulator for switched-capacitor noise-shaping A/D converters , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[23]  Franco Maloberti,et al.  Fundamental limitations of switched-capacitor sigma-delta modulators , 1992 .

[24]  M. F. Tompsett,et al.  A 10-b 15-MHz CMOS recycling two-step A/D converter , 1990 .

[25]  Hannu Tenhunen,et al.  A 20-bit sigma-delta D/A converter prototype for audio applications , 1991 .

[26]  S. Hosotani,et al.  An 8-bit 20-MS/s CMOS A/D converter with 50-mW power consumption , 1990 .

[27]  Masumi Kasahara,et al.  A CMOS 9 bit 25 MHz 100 mW ADC for mixed analog/digital LSIs , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[28]  S. J. Daubert,et al.  A transistor-only current-mode Sigma Delta modulator , 1992 .

[29]  T. L. Sculley,et al.  Nonlinearity correction techniques for high speed, high resolution A/D conversion , 1995 .

[30]  C. Svensson,et al.  A 10-bit 5-MS/s successive approximation ADC cell used in a 70-MS/s ADC array in 1.2-μm CMOS , 1994, IEEE J. Solid State Circuits.

[31]  A. Yukawa,et al.  A stable high-order delta-sigma modulator with an FIR spectrum distributor , 1993 .

[32]  A. Maeda,et al.  A 10-bit 70 MS/s CMOS D/A converter , 1991, Digest of Technical Papers., 1990 Symposium on VLSI Circuits.

[33]  A. Dingwall,et al.  An 8-MHz CMOS subranging 8-bit A/D converter , 1985, IEEE Journal of Solid-State Circuits.

[34]  L. Letham,et al.  A high-performance CMOS 70-MHz palette/DAC , 1987 .

[35]  Stephen H. Lewis,et al.  A 10-b 20-Msample/s analog-to-digital converter , 1992 .

[36]  Bruce A. Wooley,et al.  A CMOS oversampling D/A converter with a current-mode semi-digital reconstruction filter , 1993 .

[37]  Gabor C. Temes,et al.  Oversampling Delta Sigma Data Converters , 1991 .

[38]  Rudy Van De Plassche.  Integrated analog-to-digital and digital-to-analog converters / Rudy Van De Plassche , 1994 .

[39]  D. Reynolds.  A 320 MHz CMOS triple 8 bit DAC with on-chip PLL and hardware cursor , 1994 .

[40]  L. R. Carley,et al.  An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC , 1995 .

[41]  Akira Matsuzawa,et al.  A 10-b 20-MHz 30-mW pipelined interpolating CMOS ADC , 1993 .

[42]  L. Longo,et al.  A 15 b 30 kHz bandpass sigma-delta modulator , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[43]  F. Op't Eynde,et al.  A power metering ASIC with a sigma-delta-based multiplying ADC , 1994 .

[44]  Gabor C. Temes,et al.  A high-resolution multibit Sigma Delta ADC with digital correction and relaxed amplifier requirements , 1993 .

[45]  S. Jantzi,et al.  A fourth-order bandpass sigma-delta modulator , 1993 .

[46]  Chung-Yu Wu,et al.  A low glitch 10-bit 75-MHz CMOS video D/A converter , 1995 .

[47]  Bang-Sup Song,et al.  A 10-b 20-Msample/s low-power CMOS ADC , 1995, IEEE J. Solid State Circuits.

[48]  K. Hirata,et al.  A 10 b 50 MHz pipelined CMOS A/D converter with S/H , 1993 .

[49]  Michael J. Demler.  High-speed analog-to-digital conversion , 1991 .

[50]  A. Yamaguchi,et al.  A 10 bit 80 MHz glitchless CMOS D/A converter , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[51]  Behzad Razavi,et al.  Principles of Data Conversion System Design , 1994 .

[52]  M. Vertregt,et al.  A 25-Ms/s 8-bit CMOS A/D converter for embedded application , 1994 .