Power Aware IP Lookup Architecture and Algorithm for Green Router

With the development of next generation network which used Ipv6 technology, recent routers architecture meet many questions in performance, complexity and power consumption. With the expanding of network scale, how to implement a low power and MSF for IP lookup is a challenge in green high-powered router design. This paper represents a FIB multi-level mapping routing lookup architecture FMML, the dynamic routing table mapping algorithm is designed to determine the optimal strides for building tree bitmap tries so that the worst-case power consumption of the IP lookup engine is minimized. Experiments using real-life routing tables demonstrate that careful design of the data structure can reduce the power consumption dramatically.

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