A Combined Memory Compression And Hierarchical Motion Estimation Architecture For Video Encoding In Embedded Systems

In this paper a new technique is presented that combines memory compression in video encoders with fast and efficient motion estimation (ME). This technique is mainly oriented to embedded systems, which demand simple and power aware algorithms. Video encoding needs increasing amounts of memory for storing reference pictures. Memory compression allows reducing the footprint of the application, lowering the total implementation cost. In this paper, we combine memory compression and hierarchical ME so that the overhead associated to implement both techniques is shared. Thus, a net gain in processing speed is obtained, while reducing costs and power consumption