Formal Reasoning About Causality Analysis

Systems that can immediately react to their inputs may suffer from cyclic dependencies between their actions and the corresponding trigger conditions. For this reason, causality analysis has to be employed to check the constructiveness of the programs which implies the existence of unique and consistent behaviours. In this paper, we describe the embedding of various views of causality analysis into the HOL4 theorem prover to check their equivalence. In particular, we show the equivalence between the classical analysis procedure, which is based on a fixpoint computation, and a formulation as a (bounded) model checking problem.

[1]  Stephen A. Edwards,et al.  The synchronous languages 12 years later , 2003, Proc. IEEE.

[2]  William H. Kautz,et al.  The Necessity of Closed Circuit Loops in Minimal Combinational Circuits , 1970, IEEE Transactions on Computers.

[3]  Edward A. Lee,et al.  A framework for comparing models of computation , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Thomas R. Shiple,et al.  Constructive analysis of cyclic circuits , 1996, Proceedings ED&TC European Design and Test Conference.

[5]  K. Mani Chandy Parallel program design , 1989 .

[6]  Premachandran R. Menon,et al.  Redundancy identification and removal in combinational circuits , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Jim Alves-Foss,et al.  Higher Order Logic Theorem Proving and its Applications 8th International Workshop, Aspen Grove, Ut, Usa, September 11-14, 1995 : Proceedings , 1995 .

[8]  Klaus Schneider,et al.  Improving Constructiveness in Code Generators , 2005 .

[9]  Tobias Schüle,et al.  Maximal causality analysis , 2005, Fifth International Conference on Application of Concurrency to System Design (ACSD'05).

[10]  Tobias Schüle,et al.  Causality analysis of synchronous programs with delayed actions , 2004, CASES '04.

[11]  K. Mani Chandy,et al.  Parallel program design - a foundation , 1988 .

[12]  Sharad Malik Analysis of cyclic combinational circuits , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[13]  Klaus Schneider,et al.  The Synchronous Programming Language Quartz , 2009 .

[14]  Gérard Berry,et al.  The constructive semantics of pure esterel , 1996 .

[15]  Marc D. Riedel,et al.  Cyclic combinational circuits , 2004 .

[16]  D. Huffman COMBINATIONAL CIRCUITS WITH FEEDBACK , 1971 .

[17]  Axel Jantsch,et al.  Modeling embedded systems and SoCs - concurrency and time in models of computation , 2003, The Morgan Kaufmann series in systems on silicon.

[18]  Amar Mukhopadhyay Recent developments in switching theory , 1971 .

[19]  Kim Dam Petersen,et al.  Program Verification using HOL-UNITY , 1993, HUG.

[20]  Don Syme,et al.  A Theory of Finite Maps , 1995, TPHOLs.

[21]  Stephen A. Edwards,et al.  The Synchronous Languages Twelve Years Later , 1997 .

[22]  Ronald L. Rivest The Necessity of Feedback in Minimal Monotone Combinational Circuits , 1977, IEEE Transactions on Computers.

[23]  Jehoshua Bruck,et al.  Cyclic Combinational Circuits: Analysis for Synthesis , 2003 .

[24]  Edward A. Lee,et al.  Hierarchical finite state machines with multiple concurrency models , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[25]  Jehoshua Bruck,et al.  The synthesis of cyclic combinational circuits , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[26]  M. Shams Asynchronous Circuits , 2005 .