A majority of applications require cooperation of two or more independently designed, separately located, but mutually affecting subsystems. In addition to good behavior of each of the subsystems, an effective coordination is very important to achieve the desired overall performance. However, such a co-ordination is very difficult to attain mainly due to the lack of precise system models and/or dynamic parameters. In such situations, the evolvable hardware (EHW) techniques, which can achieve the sophisticated level of information processing the brain is capable of, can excel. In this paper, a new virtual reconfigurable circuit based sensor validation scheme using the techniques of evolved operators is presented. The idea of this work is to develop a system that is tolerant to sensor failures (fault tolerance) by utilizing multiple sensor inputs connected to a programmable VLSI chip. The approach chosen here is based on functional level evolution whose architecture contains many nonlinear functions and uses an evolutionary algorithm to evolve the best configuration. The system is tested for its effectiveness by choosing a real-time process control plant with three input sensors and introducing different sensor failures such as: sensor fails as open circuit, sensor fails as short circuit, noise added to individual sensors, multiple sensor failure etc.. In each case the mean square error is computed and used as the performance index.
[1]
Andrew M. Tyrrell,et al.
Design of highly parallel edge detection nodes using evolutionary techniques
,
1999,
Proceedings of the Seventh Euromicro Workshop on Parallel and Distributed Processing. PDP'99.
[2]
P. Layzell,et al.
Reducing hardware evolution's dependency on FPGAs
,
1999,
Proceedings of the Seventh International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems.
[3]
G. R. Clark,et al.
A novel function-level EHW architecture within modern FPGAs
,
1999,
Proceedings of the 1999 Congress on Evolutionary Computation-CEC99 (Cat. No. 99TH8406).
[4]
Xilinx Family.
Efficient Shift Registers, LFSR Counters, and Long Pseudo- Random Sequence Generators
,
1996
.
[5]
David E. Goldberg,et al.
Genetic Algorithms in Search Optimization and Machine Learning
,
1988
.
[6]
Andrew M. Tyrrell,et al.
Safe intrinsic evolution of Virtex devices
,
2000,
Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware.
[7]
Peter Alfke,et al.
Efficient Shift Registers, LFSR Counters, and Long Pseudo Random Sequence Generators
,
1995
.