A 0.8- mu m BiCMOS sea-of-gates implementation of the tandem banyan fast packet switch

A simple, high-performance architecture for fast packet switching, called the tandem banyan switching fabric, has been proposed. The authors report on the implementation of the routing functionality of this architecture, augmented with self-testing and fault-recovery capabilities, using a high-performance BiCMOS sea-of-gates on a 0.8- mu m technology.<<ETX>>

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