Mixed mode simulation of SRAM FinFETS
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[1] J. Benedict,et al. Two gates are better than one [double-gate MOSFET process] , 2003, IEEE Circuits and Devices Magazine.
[2] H. Yamauchi,et al. A highly threshold Voltage-controllable 4T FinFET with an 8.5-nm-thick Si-fin channel , 2004, IEEE Electron Device Letters.
[3] D. Hisamoto,et al. A fully depleted lean-channel transistor (DELTA)-a novel vertical ultra thin SOI MOSFET , 1989, International Technical Digest on Electron Devices Meeting.
[4] Keunwoo Kim,et al. Double-gate CMOS: symmetrical- versus asymmetrical-gate devices , 2001 .
[5] Meishoku Masahara,et al. Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology , 2007, 2007 IEEE Custom Integrated Circuits Conference.
[6] E.J. Nowak,et al. Turning silicon on its edge [double gate CMOS/FinFET technology] , 2004, IEEE Circuits and Devices Magazine.