Verification of an Implementation of Tomasulo's Algorithm by Compositional Model Checking

An implementation of an out-of-order processing unit based on Tomasulo's algorithm is formally verified using compositional model checking techniques. This demonstrates that finite-state methods can be applied to such algorithms, without recourse to higher-order proof systems. The paper introduces a novel compositional system that supports cyclic environment reasoning and multiple environment abstractions per signal. A proof of Tomasulo's algorithm is outlined, based on refinement maps, and relying on the novel features of the compositional system. This proof is fully verified by the SMV verifier, using symmetry to reduce the number of assertions that must be verified.

[1]  Natarajan Shankar,et al.  A Tutorial on Using PVS for Hardware Verification , 1994, TPCD.

[2]  J. Davenport.  Editor , 1960 .

[3]  GriesDavid,et al.  Verifying properties of parallel programs , 1976 .

[4]  Thomas A. Henzinger,et al.  Reactive Modules , 1996, Proceedings 11th Annual IEEE Symposium on Logic in Computer Science.

[5]  Arvind Srinivasan,et al.  Verity - A formal verification program for custom CMOS circuits , 1995, IBM J. Res. Dev..

[6]  Robert P. Kurshan,et al.  Computer-Aided Verification of Coordinating Processes: The Automata-Theoretic Approach , 2014 .

[7]  R. M. Tomasulo,et al.  An efficient algorithm for exploiting multiple arithmetic units , 1995 .

[8]  Kenneth L. McMillan,et al.  A Compositional Rule for Hardware Design Refinement , 1997, CAV.

[9]  Edmund M. Clarke,et al.  Symbolic Model Checking: 10^20 States and Beyond , 1990, Inf. Comput..

[10]  David L. Dill,et al.  Better verification through symmetry , 1996, Formal Methods Syst. Des..

[11]  Randal E. Bryant,et al.  Verifying Nondeterministic Implementations of Deterministic Systems , 1996, FMCAD.

[12]  David L. Dill,et al.  Automatic verification of Pipelined Microprocessor Control , 1994, CAV.

[13]  Amir Pnueli,et al.  Verifying out-of-order executions , 1997, CHARME.

[14]  Martín Abadi,et al.  Composing Specifications , 1989, REX Workshop.

[15]  Martín Abadi,et al.  Conjoining specifications , 1995, TOPL.

[16]  Orna Grumberg,et al.  Model checking and modular verification , 1994, TOPL.

[17]  Sérgio Vale Aguiar Campos,et al.  Symbolic Model Checking , 1993, CAV.

[18]  Rahul Razdan,et al.  The Alpha 21264: a 500 MHz out-of-order execution microprocessor , 1997, Proceedings IEEE COMPCON 97. Digest of Papers.