A 0.5erms− Temporal Noise CMOS Image Sensor With Gm-Cell-Based Pixel and Period-Controlled Variable Conversion Gain

A deep subelectron temporal noise CMOS image sensor (CIS) with a Gm-cell based pixel and a correlated-double charge-domain sampling technique has been developed for photon-starved imaging applications. With the proposed technique, the CIS, which is implemented in a standard 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CIS process, features pixel-level amplification and achieves an input-referred noise of 0.5 e<sub>rms</sub><sup>−</sup> with a correlated double sampling period of <inline-formula> <tex-math notation="LaTeX">$5~ \mu \text{s}$ </tex-math></inline-formula> and a row read-out time of <inline-formula> <tex-math notation="LaTeX">$10~\mu \text{s}$ </tex-math></inline-formula>. The proposed structure also realizes a variable conversion gain (CG) with a period-controlled method. This enables the read-out path CG and the noise-equivalent number of electrons to be programmable according to the application without any change in hardware. The experiments show that the measured CG can be tuned from <inline-formula> <tex-math notation="LaTeX">$50~\mu \text{V}$ </tex-math></inline-formula>/e- to 1.6 mV/e- with a charging period from 100 ns to <inline-formula> <tex-math notation="LaTeX">$4~\mu \text{s}$ </tex-math></inline-formula>. The measured characteristics of the prototype CIS are in a good agreement with expectations, demonstrating the effectiveness of the proposed techniques.

[1]  H. Wey,et al.  Noise transfer characteristics of a correlated double sampling circuit , 1986 .

[2]  Juha Kostamovaara,et al.  A CMOS quadrature charge-domain sampling circuit with 66-dB SFDR up to 100 MHz , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  H. Sumi,et al.  A high-sensitivity CMOS image sensor with gain-adaptive column amplifiers , 2005, IEEE Journal of Solid-State Circuits.

[4]  J. Kostamovaara,et al.  A quadrature charge-domain sampler with embedded FIR and IIR filtering functions , 2006, IEEE Journal of Solid-State Circuits.

[5]  Jan Van der Spiegel,et al.  Linear Current-Mode Active Pixel Sensor , 2007, IEEE Journal of Solid-State Circuits.

[6]  Albert J. P. Theuwissen,et al.  A CMOS Image Sensor with a Buried-Channel Source Follower , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[7]  Ahmad Mirzaei,et al.  Analysis of first-order anti-aliasing integration sampler , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  Anantha Chandrakasan,et al.  A Biomedical Sensor Interface With a sinc Filter and Interference Cancellation , 2011, IEEE Journal of Solid-State Circuits.

[9]  Peter Seitz,et al.  A sub-electron readout noise CMOS image sensor with pixel-level open-loop voltage amplification , 2011, 2011 IEEE International Solid-State Circuits Conference.

[10]  Shin Kikuchi,et al.  A 300mm wafer-size CMOS image sensor with in-pixel voltage-gain amplifier and column-level differential readout circuitry , 2011, 2011 IEEE International Solid-State Circuits Conference.

[11]  Yue Chen,et al.  A 0.7e−rms-temporal-readout-noise CMOS image sensor for low-light-level imaging , 2012, 2012 IEEE International Solid-State Circuits Conference.

[12]  Robert Bogdan Staszewski,et al.  Analysis and Design of a High-Order Discrete-Time Passive IIR Low-Pass Filter , 2014, IEEE Journal of Solid-State Circuits.

[13]  P. Magnan,et al.  CMOS Image Sensor Noise Analysis Through Noise Power Spectral Density Including Undersampling Effect Due to Readout Sequence , 2014, IEEE Transactions on Electron Devices.

[14]  E. Fossum,et al.  Characterization of Quanta Image Sensor Pump-Gate Jots With Deep Sub-Electron Read Noise , 2015, IEEE Journal of the Electron Devices Society.

[15]  Fu-Lung Hsueh,et al.  A 0.66e−rms temporal-readout-noise 3D-stacked CMOS image sensor with conditional correlated multiple sampling (CCMS) technique , 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

[16]  E. Fossum,et al.  Quanta Image Sensor Jot With Sub 0.3e- r.m.s. Read Noise and Photon Counting Capability , 2015, IEEE Electron Device Letters.

[17]  Shoji Kawahito,et al.  A 0.27e-rms Read Noise 220-μV/e-Conversion Gain Reset-Gate-Less CMOS Image Sensor With 0.11-μm CIS Process , 2015, IEEE Electron Device Letters.

[18]  Rihito Kuroda,et al.  A linear response single exposure CMOS image sensor with 0.5e− readout noise and 76ke− full well capacity , 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

[19]  Albert Theuwissen,et al.  A CMOS image sensor with nearly unity-gain source follower and optimized column amplifier , 2016, 2016 IEEE SENSORS.

[20]  Franziska Hoffmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[21]  Christian Enz,et al.  A Sub-0.5 Electron Read Noise VGA Image Sensor in a Standard CMOS Process , 2016, IEEE Journal of Solid-State Circuits.

[22]  C. Enz,et al.  Temporal Readout Noise Analysis and Reduction Techniques for Low-Light CMOS Image Sensors , 2016, IEEE Transactions on Electron Devices.

[23]  Tongxi Wang,et al.  4.8 A 0.44e−rms read-noise 32fps 0.5Mpixel high-sensitivity RG-less-pixel CMOS image sensor using bootstrapping reset , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).