A 65nm CMOS 3.6GHz fractional-N PLL with 5th-order ΔΣ modulation and weighted FIR filtering

A 3.6GHz fractional-N PLL utilizing high-order digital modulation and weighted 13-tap finite impulse response (FIR) filtering for low spur and enhanced noise reduction is implemented in 65nm CMOS. The prototype PLL exhibits nearly −100dBc/Hz in-band noise contribution and −126.8dBc/Hz phase noise at a 3MHz offset from a 1.8GHz carrier. With 5th-order single-loop ΔΣ modulation, the fractional spur levels of −65.6dBc and −58.5dBc are achieved within the bandwidth and near the bandwidth, respectively.

[1]  Xueyi Yu,et al.  A $\Delta\Sigma$ Fractional-N Synthesizer With Customized Noise Shaping for WCDMA/HSDPA Applications , 2009, IEEE Journal of Solid-State Circuits.

[2]  Xueyi Yu,et al.  A ΔΣ fractional-N synthesizer with customized noise shaping for WCDMA/HSDPA applications , 2008, 2008 IEEE Custom Integrated Circuits Conference.

[3]  Lars C. Jansson,et al.  A wideband 2.4-GHz delta-sigma fractional-NPLL with 1-Mb/s in-loop modulation , 2004, IEEE Journal of Solid-State Circuits.

[4]  Zhihua Wang,et al.  Customized zero frequency control for hybrid FIR noise filtering in ΣΔ fractional-N PLL , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[5]  Bang-Sup Song,et al.  A 1.8GHz Spur-Cancelled Fractional-N Frequency Synthesizer with LMS-Based DAC Gain Calibration , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[6]  Dai Jiang,et al.  Intermodulation-borne fractional-N frequency synthesiser spurious components , 2004 .

[7]  Zhihua Wang,et al.  A 1GHz Fractional-N PLL Clock Generator with Low-OSR ΔΣ Modulation and FIR-Embedded Noise Filtering , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[8]  M.H. Perrott,et al.  A 1-MHZ bandwidth 3.6-GHz 0.18-/spl mu/m CMOS fractional-N synthesizer utilizing a hybrid PFD/DAC structure for reduced broadband phase noise , 2006, IEEE Journal of Solid-State Circuits.

[9]  K.J. Wang,et al.  A Wide-Bandwidth 2.4GHz ISM-Band Fractional-N PLL with Adaptive Phase-Noise Cancellation , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[10]  Ian Galton,et al.  A Wide-Bandwidth 2.4 GHz ISM Band Fractional-$N$ PLL With Adaptive Phase Noise Cancellation , 2007, IEEE Journal of Solid-State Circuits.