A High-Resolution DPWM Generation Topology for Digitally Controlled Precision DC/DC Converters at the APS
暂无分享,去创建一个
The APS storage ring uses DC/DC converters to power the magnets. High resolution for current regulation is desired for future improvement. It is calculated that at least 20to 21-bit digital pulse width modulation (DPWM) is required in the proposed digital control system. This paper proposes a digital control system that adopts a new DPWM topology to achieve 21-bit DPWM without gigahertz system clock. The proposed topology uses a combination of a field-programmable gate array (FPGA) and a serializer chip TLK2541 from TI. The FPGA calculates the desired PWM signals and sends them to the TLK2541 chip. Then, the TLK2541 generates corresponding high-resolution DPWM pulses. An FPGA development board has been used to develop a prototype system to verify the proposed DPWM generation topology. This paper discusses the circuit topology and the experiment results.
[1] Seth R. Sanders,et al. Quantization resolution and limit cycling in digitally controlled PWM converters , 2003 .
[2] A. Prodic,et al. Multibit $\Sigma$–$\Delta$ PWM Digital Controller IC for DC–DC Converters Operating at Switching Frequencies Beyond 10 MHz , 2007, IEEE Transactions on Power Electronics.