Functional testing and constrained synthesis of sequential architectures
暂无分享,去创建一个
[1] Kwang-Ting Cheng,et al. A single-state-transition fault model for sequential machines , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[2] Yanghee Choi,et al. Approaches utilizing segment overlap to minimize test sequences , 1990, PSTV.
[3] Tiziano Villa,et al. Experiments on the synthesis and testability of non-scan finite state machines , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.
[4] Irith Pomeranz,et al. On achieving a complete fault coverage for sequential machines using the transition fault model , 1991, 28th ACM/IEEE Design Automation Conference.
[5] Krishan K. Sabnani,et al. A Protocol Test Generation Procedure , 1988, Comput. Networks.
[6] Fabrizio Lombardi,et al. Evaluation and improvement of fault coverage for verification and validation of protocols , 1990, Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing 1990.
[7] Srinivas Devadas. Optimizing interacting finite state machines using sequential don't cares , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[8] Robert K. Brayton,et al. Extracting local don't cares for network optimization , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[9] K.-T. Cheng,et al. A Partial Scan Method for Sequential Circuits with Feedback , 1990, IEEE Trans. Computers.
[10] Klaus D. Müller-Glaser,et al. On the selection of a partial scan path with respect to target faults , 1991, Proceedings of the European Conference on Design Automation..