A Filtering ΔΣ ADC for LTE and Beyond

This paper presents a filtering ADC for the LTE communication standard, where a second-order Delta-Sigma modulator (DSM) is incorporated into the third-order Chebyshev channel-select filter (CSF) of the radio receiver. The CSF introduces an additional third-order suppression of both thermal and quantization DSM noise, while the CSF transfer function is maintained. A design method for the filtering ADC accounting for unavoidable DSM-DAC delays is developed and experimentally demonstrated. The 65 nm CMOS prototype is clocked at 576/288 MHz with an 18.5/9.0 MHz LTE bandwidth, has an in-band gain of 26 dB, an SNDR of 56.4/58.1 dB, an input-referred noise of 5 nV/ √{Hz}, and an out-of-band (half-duplex) IIP3 of 20/12 dBV rms , with a power consumption of 7.9/5.4 mW and an overall state-of-the art performance.

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