Partially Pipelined VLSI Implementation of Blowfish Encryption/Decryption Algorithm

Information security has always been important in all aspects of life as technology controls various operations. Cryptography provides a layer of security in cases where the medium of transmission is susceptible to interception, by translating a message into a form that cannot be read by an unauthorized third party. All non-quantum transmission media known today are capable of being intercepted in one way or another. This paper seeks to implement a novel partial pipelined, robust architecture of Blowfish algorithm in hardware. Blowfish algorithm has no known cryptanalysis. The best proven attack against Blowfish till date is an exhaustive brute-force attack. This makes Blowfish an attractive cryptographic algorithm since it is not susceptible to any reasonable attack. The hardware implementation of Blowfish would be a powerful tool for any mobile device, or any technology requiring strong encryption. The proposed design uses the core_slow library for worst-case scenario analysis and attains an incredible encryption speed of 2670 MBits/sec and decryption speed of 2642 MBits/sec. The area is 5986 LUT's and the power is a mere 77 mW.