Parallel Algorithms on the CEDAR System

While significant progress has been made in developing efficient algorithms for vector machines, the same cannot be said of parallel processors which provide concurrency and vectorization along with a complex memory system. The three aspects of these architectures must be addressed simultaneously and are often contradictory; increasing vector length may destroy data locality and thereby lead to inefficient use of the hierarchical memory system. In this paper, we consider the tradeoffs involved in designing algorithms for such architectures and present some results for a single cluster of the CEDAR machine. 22 refs., 14 figs.

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