Transient power supply current monitoring—A new test method for CMOS VLSI circuits

We present a new method for testing digital CMOS integrated circuits. The new method is based on the following premise: monitor the switching behavior of a circuit as opposed to the output logic state. We use the transient power supply current as a window of observability into the circuit switching behavior. A method for isolating normal switching transients from those which result from defects is introduced. The feasibility of this new testing approach is investigated by conducting several experiments involving the design of integrated circuits with built-in defects, fabrication, and physical testing. The results of these experiments show this new test method to be a promising one for detecting defects that can escape stuck-at testing andIDDQ testing.

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