论文信息 - Dual-core motion estimation processor

Dual-core motion estimation processor

This paper presents a motion estimation processor based on a dual-core architecture. Both cores are based on bit-serial adder trees. Memory structures are also described. This architecture is bit-precision reconfigurable. Performance results for several smartphones and tablets are presented. Furthermore, hardware results and comparison with other works are included. Real-time processing is achieved for all devices studied.

José M. Palomares | Joaquín Olivares

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