Evolution of digital circuits

Since the early 1990's researchers have begun to apply evolutionary algorithms to design electronic circuits. Nowadays it is evident that the evolutionary design approach can automatically create efficient electronic circuits in many domains. This tutorial surveys fundamental concepts of evolutionary circuit design. It introduces relevant search algorithms and basics of digital circuit design principles. Several case studies will be presented to demonstrate strength and weakness of the method, including evolutionary synthesis of gate-level circuits, image filter evolution in FPGA and evolution of benchmark circuits for evaluation of testability analysis methods. FPGAs will be presented as accelerators for evolutionary circuit design and circuit adaptation. Finally, it will be shown how to cope with the so-called scalability problem of evolutionary design which has been identified as the most important problem from the point of view of applications.

[1]  Rudy Lauwereins,et al.  Design, Automation, and Test in Europe , 2008 .

[2]  Eduardo de la Torre,et al.  Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support , 2011, 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

[3]  Paul J. Layzell,et al.  Explorations in design space: unconventional electronics design through artificial evolution , 1999, IEEE Trans. Evol. Comput..

[4]  John R. Koza Genetic Programming III - Darwinian Invention and Problem Solving , 1999, Evolutionary Computation.

[5]  Lukás Sekanina,et al.  This is an author-created accepted version of the paper: Vasicek Z., Sekanina L.: Formal Verification of Candidate Solutions for Post- Synthesis Evolutionary Optimization in Evolvable Hardware. Genetic Programming and Evolvable Machines, Spec. Issue on Evolvable Hardware , 2011 .

[6]  Zdenek Kotásek,et al.  Evolution of synthetic RTL benchmark circuits with predefined testability , 2008, TODE.

[7]  Kenji Toda,et al.  Real-world applications of analog and digital evolvable hardware , 1999, IEEE Trans. Evol. Comput..

[8]  Lukas Sekanina,et al.  Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units , 2012 .

[9]  Lukás Sekanina,et al.  A global postsynthesis optimization method for combinational circuits , 2011, 2011 Design, Automation & Test in Europe.

[10]  Lukas Sekanina,et al.  An evolvable hardware system in Xilinx Virtex II Pro FPGA , 2007 .

[11]  John R. Koza,et al.  Genetic Programming IV: Routine Human-Competitive Machine Intelligence , 2003 .

[12]  Lukás Sekanina,et al.  An Efficient Selection Strategy for Digital Circuit Evolution , 2010, ICES.

[13]  Lukás Sekanina,et al.  Image Filter Design with Evolvable Hardware , 2002, EvoWorkshops.

[14]  Marc Ebner,et al.  Evolvable Hardware , 2004, Künstliche Intell..

[15]  John F. Wakerly,et al.  Digital design - principles and practices , 1990, Prentice Hall Series in computer engineering.

[16]  Tughrul Arslan,et al.  Evolvable Components—From Theory to Hardware Implementations , 2005, Genetic Programming and Evolvable Machines.

[17]  Lukás Sekanina,et al.  An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs , 2007, 2007 International Conference on Field Programmable Logic and Applications.

[18]  Julian Francis Miller,et al.  Evolution in Materio: Exploiting the Physics of Materials for Computation , 2008, Int. J. Unconv. Comput..

[19]  Hitoshi Iba,et al.  Evolving hardware with genetic learning: a first step towards building a Darwin machine , 1993 .

[20]  John Wakerly,et al.  Digital Design: Principles and Practices (4th Edition) , 2005 .

[21]  Doina Logofătu,et al.  Evolutionary Algorithms in Vlsi-cad , 2010 .

[22]  Julian Francis Miller,et al.  Towards the automatic design of more efficient digital circuits , 2000, Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware.

[23]  Garrison W. Greenwood,et al.  Introduction to Evolvable Hardware - A Practical Guide for Designing Self-Adaptive Systems , 2006 .

[24]  Julian Francis Miller,et al.  Cartesian genetic programming , 2000, GECCO '10.