Performance analysis and optimization of asynchronous circuits

Asynchronous/self-timed circuits are beginning to attract renewed attention as a promising means of dealing with the complexity of modern VLSI designs. Very few analysis techniques or tools are available for estimating their performance. We adapt the theory of generalized timed Petri-nets (GTPN) for analyzing and comparing asynchronous circuits ranging from purely control-oriented circuits to those with data dependent control. Experiments with the GTPN analyzer are found to track the observed performance of actual asynchronous circuits, thereby offering empirical evidence towards the soundness of the modeling approach.<<ETX>>

[1]  Gaetano Borriello,et al.  An algorithm for exact bounds on the time separation of events in concurrent systems , 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

[2]  Mary K. Vernon,et al.  A Generalized Timed Petri Net Model for Performance Analysis , 1985, IEEE Transactions on Software Engineering.

[3]  Gaetano Borriello,et al.  An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems , 1995, IEEE Trans. Computers.

[4]  Wlodzimierz M. Zuberek,et al.  Timed Petri nets and preliminary performance evaluation , 1980, ISCA '80.

[5]  David L. Dill,et al.  Specification and automatic verification of self-timed queues , 1989, Formal Methods Syst. Des..

[6]  Erik Brunvand.  The NSR processor , 1993, [1993] Proceedings of the Twenty-sixth Hawaii International Conference on System Sciences.

[7]  C. V. Ramamoorthy,et al.  Performance Evaluation of Asynchronous Concurrent Systems Using Petri Nets , 1980, IEEE Transactions on Software Engineering.

[8]  Marco Ajmone Marsan,et al.  Performance models of multiprocessor systems , 1987, MIT Press series in computer systems.

[9]  Tadao Murata,et al.  Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.

[10]  Ganesh Gopalakrishnan,et al.  Developing micropipeline wavefront arbiters , 1994, IEEE Design & Test of Computers.

[11]  Michael K. Molloy.  Performance Analysis Using Stochastic Petri Nets , 1982, IEEE Transactions on Computers.

[12]  Michael Kishinevsky,et al.  Performance Analysis Based on Timing Simulation , 1994, 31st Design Automation Conference.

[13]  Ganesh Gopalakrishnan,et al.  SHILPA: a high-level synthesis system for self-timed circuits , 1992, ICCAD.

[14]  David Misunas,et al.  Petri nets and speed independent design , 1973, Commun. ACM.

[15]  Steven Burns.  Performance Analysis and Optimization of Asynchronous Circuits , 1991 .

[16]  Mary K. Vernon,et al.  The GTPN Analyzer: Numerical Methods and User Interface , 1986, FJCC.

[17]  Ted Eugene Williams,et al.  Self-timed rings and their application to division , 1992 .

[18]  Lynn Conway,et al.  Introduction to VLSI systems , 1978 .