Design space exploration for a DT-CNN
暂无分享,去创建一个
[1] Mark Harm ter Brugge. Morphological design of Discrete-Time Cellular Neural Networks , 2005 .
[2] L. Spaanenburg,et al. Velocity Measurement by a Vision Sensor , 2006, 2006 IEEE International Conference on Computational Intelligence for Measurement Systems and Applications.
[3] Kees Goossens,et al. AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.
[4] Lin-Bao Yang,et al. Cellular neural networks: theory , 1988 .
[5] Péter Szolgay,et al. Configurable multi-layer CNN-UM emulator on FPGA , 2002, Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications.
[6] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .
[7] Tamás Roska,et al. The CNN universal machine Part 1: The architecture , 1992 .
[8] Ángel Rodríguez-Vázquez,et al. ACE4k: An analog I/O 64×64 visual microprocessor chip with 7-bit analog accuracy: Research Articles , 2002 .
[9] Hubert Harrer. Discrete time cellular neural networks , 1992, Int. J. Circuit Theory Appl..
[10] Tamás Roska,et al. The CNN universal machine. I. The architecture , 1992, CNNA '92 Proceedings Second International Workshop on Cellular Neural Networks and Their Applications.
[11] Ángel Rodríguez-Vázquez,et al. ACE16k: the third generation of mixed-signal SIMD-CNN ACE chips toward VSoCs , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.
[12] Suleyman Malki. Discrete-Time Cellular Neural Networks Implemented on Field-Programmable Gate-Arrays to Build a Virtual Sensor System , 2006 .
[13] Cheng Wang,et al. In Search or a Robust Digital CNN System , 2006, 2006 10th International Workshop on Cellular Neural Networks and Their Applications.
[14] Ángel Rodríguez-Vázquez,et al. ACE4k: An analog I/O 64×64 visual microprocessor chip with 7-bit analog accuracy , 2002, Int. J. Circuit Theory Appl..