25 Gb/s photoreceiver based on vertical-illumination type Ge-on-Si photodetector and CMOS amplifier circuit for optical interconnects

We report the silicon photonic receivers based on the hybrid-integrated vertical-illumination-type germanium-on-silicon photodetector and CMOS amplifier circuit, for optical interconnects. The high-speed vertical-illumination-type Ge-on-Si photodetector is defined on a bulk-silicon wafer, and the CMOS amplifier chip was designed with 65nm ground rule. The PCB-packaged 4 channel 25 Gb/s photoreceiver exhibits a resposivity of 0.68A/W. The sensitivity measured at a BER of 10−12 is -8.3 dBm and -2.4dBm for 25Gb/s and 32Gb/s, respectively. The energy efficiency is 2.19 pJ/bit at 25 Gb/s. The single-channel butterfly-packaged photoreceiver exhibits the sensitivity of -11dBm for 25 Gb/s at a BER of 10−12. The energy efficiency is 2.67 pJ/bit at 25 Gb/s.

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