Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks

In multimedia applications, the stringent requirements for balancing transmission capacity, flexible service provisioning and cost reduction lead the manufactures to provide highly integrated System-on Chip (SoC) solutions. This paper analyzes the application of high-bandwidth-networking SoCs to improve on the cost efficiency of multimedia service distribution in home networks. We present a case study, where we utilize the inherent protocol processing capabilities and high bandwidth interfaces of a modern network processor, scaled down to match the performance targets and low cost requirements of the home networking environment. An efficient, low cost Residential Gateway architecture results by mapping the home services onto the processing and memory blocks of this SoC.

[1]  Chantal Ykman-Couvreur,et al.  System-level performance optimization of the data queueing memory management in high-speed network processors , 2002, DAC '02.

[2]  Th. Zahariadis,et al.  A Comparison of Competing Broadband in Home Technologies , 2002 .

[3]  David A. Patterson,et al.  Computer architecture (2nd ed.): a quantitative approach , 1996 .

[4]  N. Zervos,et al.  Application decomposition for high-speed network processing platforms , 2002, 2nd European Conference on Universal Multiservice Networks. ECUMN'2001 (Cat. No.02EX563).

[5]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[6]  Pierre G. Paulin,et al.  Network processors: a perspective on market requirements, processor architectures and embedded S/W tools , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

[7]  George I. Stassinopoulos,et al.  Efficient implementation of the SAR sublayer and the ATM layer in high speed broadband ISDN data terminal adapters , 1993, Proceedings of ICC '93 - IEEE International Conference on Communications.

[8]  S. Teger,et al.  End-user perspectives on home networking , 2002 .

[9]  R. Wilder,et al.  Wide-area Internet traffic patterns and characteristics , 1997, IEEE Netw..

[10]  Gregory Doumenis,et al.  A Parallel VLSI Video/Communication Controller , 2001, J. VLSI Signal Process..

[11]  David A. Patterson,et al.  Computer Architecture - A Quantitative Approach, 5th Edition , 1996 .