Hardware-in-the-loop simulation framework

Embeddedcontrol Systems ECSs are becomingmore and more present around us. Compared to usual Computer programmingimplementationsthey haveadded problems like robustness,code efficiency, code compactnessand safetywhichmake themdifficultto implement. Moreover,such Systemsare often used in criticaland hazardousapplicationswhere a precise and methodological implementationis mandatory.Most ECSs are thereforevery conservative in their implementation and the development costs are much bigger than for usual Computer programs. Moreover, it is difficult to replace or correctSoftware errors after shipping, and consequentlythe ability to test such Systems methodologically before shipping is very important. In this thesis we examine a new approach for testing embedded Systems based on temporal logic and fault generation. We added those features to a generic Hardware-in-the-loop(HIL) frameworkwhich enables a simpler implementationof application specific HIL Simulators. To prove the feasibility of our approachwe applied it to the testing of twovery different applications, a model helicopter controlledby a customized ECS, and a hydro-powerplantbarrage controlled by a small ECS. Our contribution to the field includes a novel approach for specifying fault sequences and the correspondingresponseof the embedded control system under test. Due to this addition to the HIL Simulator, we are able to test more systematically embedded Systems for their safety and robustness in hazardousor critical situations.