Monte Carlo-Based Yield Estimation: New Methodology

Today’s analog IC sizing and optimization tools are mostly simulation based due to the results accuracy brought by commercial electrical simulators. Additionally, most of the optimization kernels, adopted by those tools, are based on evolutionary optimization algorithms or other metaheuristic techniques because of the large search space that must be explored to find the optimal solutions. The development of an accurate MC-based yield estimation technique that enables evolutionary-based analog IC sizing and optimization tools to search for more robust solutions is a challenging task that must be achieved. The early prediction of variability effect, particularly at the new nanometer technology nodes that are very sensitive to variability effects, is one of the keys to improve production costs. The addition of a large number of MC simulations, to accurately estimate the solutions yield, may increase, beyond an acceptable value, the search time for optimal IC solutions when evolutionary-based optimization algorithms are adopted. This chapter addresses this problem and presents a new MC-based yield estimation methodology with a reduced time impact in the overall optimization processes, which allows its adoption in today’s state-of-the-art evolutionary-based analog IC sizing tools.