A One-Dimensional Analog VLSI Implementation for Nonlinear Real-Time Signal Preprocessing

Reconstruction of given noisy data is an ill-posed problem and a computationally intensive task. Nonlinear regularization techniques are used to find a unique solution under certain constraints. In our contribution we present a parallel mixed-signal architecture which solves this nonlinear problem with in microseconds. By connecting all parallel cells in a circular manner it is possible to process noisy data vectors of infinite length. This is achieved by virtually shifting the nonlinear adaptive filter kernel over the noisy data vector. Additionally, we focus on the interaction between theory, discretization, numerical simulations, macro-modeling, and analog VLSI implementation for a theoretically well understood class of computer vision in an exemplary and paradigmatic way. A one-dimensional (1D) experimental chip has been fabricated using 0.8 ?m CMOS technology. On-chip measurements are shown to agree with results from numerical simulations. Results from applying the 1D chip to nonlinear smoothing of two-dimensional image data will also be given correspondence.

[1]  Edward J. Delp,et al.  Discontinuity preserving regularization of inverse visual problems , 1994, IEEE Trans. Syst. Man Cybern..

[2]  Tobi Delbrueck,et al.  Investigations of Visual Transduction and Motion Processing , 1996 .

[3]  Donald Geman,et al.  Stochastic Relaxation, Gibbs Distributions, and the Bayesian Restoration of Images , 1984, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[4]  Terri S. Fiez,et al.  Analog VLSI : signal and information processing , 1994 .

[5]  C. Schnorr,et al.  Dynamic circular cellular networks for adaptive smoothing of multi-dimensional signals , 1998, 1998 Fifth IEEE International Workshop on Cellular Neural Networks and their Applications. Proceedings (Cat. No.98TH8359).

[6]  Lei Wang,et al.  Large-image CNN hardware processing using a time multiplexing scheme , 1996, 1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96).

[7]  Á. Rodríguez-Vázquez,et al.  Current-mode techniques for the implementation of continuous- and discrete-time cellular neural networks , 1993 .

[8]  Rainer Sprengel.  Entwurf und Analyse nichtlinearer Diffusionsverfahren für die Bildverarbeitung , 1996, DISKI.

[9]  Alan Mathewson,et al.  Optimizing MOS transistor mismatch , 1998, IEEE J. Solid State Circuits.

[10]  Jean-Michel Morel,et al.  Variational methods in image segmentation , 1995 .

[11]  L.O. Chua,et al.  Cellular neural networks , 1993, 1988., IEEE International Symposium on Circuits and Systems.

[12]  C. Schnorr,et al.  On globally asymptotically stable continuous-time CNNs for adaptive smoothing of multidimensional signals , 1996, 1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96).

[13]  Andrew Blake,et al.  Visual Reconstruction , 1987, Deep Learning for EEG-Based Brain–Computer Interfaces.

[14]  Leon O. Chua,et al.  Cellular neural networks: applications , 1988 .

[15]  Jin Luo,et al.  Resistive Fuses: Analog Hardware for Detecting Discontinuities in Early Vision , 1989, Analog VLSI Implementation of Neural Systems.

[16]  Edgar Sanchez-Sinencio,et al.  A current-mode cellular neural network implementation , 1993 .

[17]  C Koch,et al.  A two-dimensional analog VLSI circuit for detecting discontinuities in early vision. , 1990, Science.

[18]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[19]  J. M. Cruz,et al.  A 16 × 16 Cellular Neural Network Universal Chip: The First Complete Single-Chip Dynamic Computer Array with Distributed Memory and with Gray-Scale Input-Output , 1998 .

[20]  Leon O. Chua,et al.  Cellular neural networks: Theory and circuit design , 1992, Int. J. Circuit Theory Appl..

[21]  D. Mumford,et al.  Optimal approximations by piecewise smooth functions and associated variational problems , 1989 .

[22]  Kari Halonen,et al.  Fast and Compact 16 by 16 Cellular Neural Network Implementation , 1997 .

[23]  Tomaso Poggio,et al.  Computational vision and regularization theory , 1985, Nature.

[24]  Michiel Steyaert,et al.  Analog VLSI Integration of Massive Parallel Signal Processing Systems , 1996 .

[25]  T. Poggio,et al.  III-Posed problems early vision: from computational theory to analogue networks , 1985, Proceedings of the Royal Society of London. Series B. Biological Sciences.

[26]  Christoph Schnörr,et al.  Real-Time Adaptive Smoothing with a 1-D Nonlinear Relaxation , 1998, DAGM-Symposium.

[27]  L. Rudin,et al.  Nonlinear total variation based noise removal algorithms , 1992 .

[28]  Lin-Bao Yang,et al.  Cellular neural networks: theory , 1988 .

[29]  Takashi Matsumoto,et al.  A Floating-Gate MOS Implementation of Resistive Fuse , 1998, Neural Computation.

[30]  Eric A. Vittoz,et al.  Analog VLSI signal processing: Why, where, and how? , 1994, J. VLSI Signal Process..

[31]  B.J. Hosticka,et al.  Performance comparison of analog and digital circuits , 1985, Proceedings of the IEEE.

[32]  Massimo A. Sivilotti,et al.  Real-time visual computations using analog CMOS processing arrays , 1987 .

[33]  Ángel Rodríguez-Vázquez,et al.  A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage , 1997, IEEE J. Solid State Circuits.

[34]  T. Poggio,et al.  Ill-posed problems in early vision: from computational theory to analogue networks , 1985, Proceedings of the Royal Society of London. A. Mathematical and Physical Sciences.

[35]  Ángel Rodríguez-Vázquez,et al.  Smart-pixel cellular neural networks in analog current-mode CMOS technology , 1994 .

[36]  Leon O. Chua,et al.  The CNN paradigm , 1993 .

[37]  Ulrich Ramacher,et al.  Current mode implementation of a neural algorithm for image preprocessing , 1996, Proceedings of Fifth International Conference on Microelectronics for Neural Networks.

[38]  Kwabena Boahen,et al.  Translinear circuits in subthreshold MOS , 1996 .

[39]  Peter R. Kinget,et al.  A programmable analog cellular neural network CMOS chip for high speed image processing , 1995, IEEE J. Solid State Circuits.

[40]  Mohammed Ismail,et al.  Analog VLSI Implementation of Neural Systems , 2011, The Kluwer International Series in Engineering and Computer Science.

[41]  Ángel Rodríguez-Vázquez,et al.  A 0.8 micrometer CMOS 2-D Programmable Mixed-Signal Focal-Plane Array Processor with On-Chip Binary Imaging and Instructions Storage , 1997 .

[42]  Philippe G. Ciarlet,et al.  The Finite Element Method for Elliptic Problems. , 1981 .