Digital calibration for monotonic pipelined A/D converters
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David J. Allstot | Jianjun Guo | Waisiu Law | Ward J. Helms | D. Allstot | Jianjun Guo | W. Helms | Waisiu Law
[1] T. L. Sculley,et al. A digitally self-calibrating 14-bit 10-MHz CMOS pipelined A/D converter , 2002 .
[2] Bruce A. Wooley,et al. A continuously calibrated 12-b, 10-MS/s, 3.3-V A/D converter , 1998 .
[3] Bang-Sup Song,et al. A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter , 1988 .
[4] Jianjun Guo,et al. Digital calibration methods for high-accuracy pipeline A/D converters , 2003, Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412).
[5] Mikael Skoglund,et al. A calibration scheme for imperfect quantizers , 2000, IEEE Trans. Instrum. Meas..
[6] Stephen H. Lewis,et al. A 10-b 20-Msample/s analog-to-digital converter , 1992 .
[7] Paul R. Gray,et al. A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS , 1991 .
[8] D. Miyazaki,et al. A 16 mW 30 MSample/s 10 b pipelined A/D converter using a pseudo-differential architecture , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).
[9] P.G.A. Jespers,et al. A CMOS 13-b cyclic RSD A/D converter , 1992, IEEE Journal of Solid-State Circuits.
[10] Hae-Seung Lee,et al. A Nyquist-rate pipelined oversampling A/D converter , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).
[11] S. H. Lewis,et al. An 8-bit 80-Msample/s pipelined analog-to-digital converter with background calibration , 2001 .
[12] Shoji Kawahito,et al. A 10-b 30-MS/s low-power pipelined CMOS A/D converter using a pseudodifferential architecture , 2003, IEEE J. Solid State Circuits.
[13] A. Karanicolas,et al. A 15-b 1-Msample/s digitally self-calibrated pipeline ADC , 1993 .
[14] Bang-Sup Song,et al. Digital-domain calibration of multistep analog-to-digital converters , 1992 .
[15] L. R. Carley,et al. An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC , 1995 .
[16] Wenhua Yang,et al. A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input , 2001, IEEE J. Solid State Circuits.