On using deterministic test sets in BIST
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[1] Arno Kunzmann. Efficient random testing with global weights , 1996, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition.
[2] Hans-Joachim Wunderlich,et al. Pattern generation for a deterministic BIST scheme , 1995, ICCAD.
[3] H. Wunderlich,et al. Bit-flipping BIST , 1996, ICCAD 1996.
[4] Tomasz Garbolino,et al. A New LFSR with D and T Flip-Flops as an Effective Test Pattern Generator for VLSI Circuits , 1999, EDCC.
[5] Nur A. Touba,et al. Transformed pseudo-random patterns for BIST , 1995, Proceedings 13th IEEE VLSI Test Symposium.
[6] B. Koneman,et al. LFSR-Coded Test Patterns for Scan Designs , 1993 .
[7] Ondrej Novák,et al. Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata , 1999, EDCC.
[8] Nur A. Touba,et al. Synthesis of mapping logic for generating transformed pseudo-random patterns for BIST , 1995, Proceedings of 1995 IEEE International Test Conference (ITC).
[9] Krishnendu Chakrabarty,et al. Built-in test pattern generation for high-performance circuits using twisted-ring counters , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).
[10] Dhiraj K. Pradhan,et al. A novel pattern generator for near-perfect fault-coverage , 1995, Proceedings 13th IEEE VLSI Test Symposium.