1-nm-thick EOT high mobility Ge n- and p-MOSFETs with ultrathin GeOx/Ge MOS interfaces fabricated by plasma post oxidation

An ultrathin EOT Al<inf>2</inf>O<inf>3</inf>/GeO<inf>x</inf>/Ge gate stack with a superior GeO<inf>x</inf>/Ge MOS interface has been fabricated with a plasma post oxidation method. The properties of the ultra thin GeO<inf>x</inf>/Ge MOS interfaces are examined systemically, and it is revealed that there is a universal relationship between the D<inf>it</inf> at GeO<inf>x</inf>/Ge interface and the GeO<inf>x</inf> thickness, and a 0.5-nm-thick GeO<inf>x</inf> (0.35 nm EOT) is sufficient to suppress the D<inf>it</inf>. The Ge n- and p-MOSFETs using the Al<inf>2</inf>O<inf>3</inf>/GeO<inf>x</inf>/Ge gate stacks are fabricated on (100), (110) and (111) Ge. High mobility Ge n-MOSFETs with sub-nm EOT have been realized for the first time with record high mobilities of 937 and 691 cm²/Vs at EOT of 1.14 and 0.98 nm. It is found that the sufficient suppression of D<inf>it</inf> allows us to obtain high peak mobilities even in sub-nm EOT range, while further improvements in surface roughness and suppression of the density of remaining Coulomb scattering centers such as fixed charges and slow traps are still needed to further enhance the performances of Ge n- and p-MOSFETs.