Area Efficient Exponentiation Using Modular Multiplier/Squarer in GF(2m

This paper presents a new exponentiation architecture and multiplier/squarer for GF(2m), which uses a standard basis representation. The proposed multiplier/squarer is used as kernel architecture of exponentiation. Although the proposed multiplier/squarer computes the multiplication and squaring operations at the same time in GF(2m), the common parts existing in both operations are only executed once, thereby reducing the required hardware compared to related systolic circuits. The proposed multiplier/squarer can be easily applied to exponentiation architecture. It is also well suited to VLSI implementation because of its regularity, modularity, and unidirectional data flow.