An accurate equivalent circuit model of flip chip and via interconnects

In this paper, the transition discontinuities of flip chip circuits are modeled and investigated using finite-difference time-domain (FDTD) method to predict the S-parameters of different packages. This includes transition between two coplanar lines on the chip and mother board and transition between two striplines in a package. The computed S-parameter of the flip chip package using the FDTD model are used to develop an equivalent circuit for the transition discontinuity over a wide frequency band. A general and accurate equivalent circuit model of the interconnect has been developed and presented. In this circuit model, a statistical analysis is used to compute the value of the circuit elements. Also, losses in the flip chip package are represented by a simple function versus frequency. These losses include substrate loss of the chip and the mother board due to excitation of surface wave and radiation loss due to the bump. Conductor and material substrate losses are not included in this circuit model. Good agreement has been obtained between the S-parameters of the FDTD model and the equivalent circuit model over a wide frequency band of up to 50 GHz. Furthermore, the effects of the bump dimensions on the equivalent circuit model has been also evaluated and presented. The results show important issues in the design of the flip chip interconnect. The bump dimensions can be used as impedance matching parameters to achieve minimum losses over a wide frequency band. The presented equivalent circuit model can be used in commercial circuit simulators to predict monolithic microwave/millimeter wave integrated circuit (MMIC) performance including the package.