Languages for Embedded Systems

[1]  Rainer Leupers,et al.  Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs , 2008, SAMOS.

[2]  Sandeep K. Shukla,et al.  Model-Driven Validation of SystemC Designs , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[3]  Weng-Fai Wong,et al.  Generating hardware from OpenMP programs , 2006, 2006 IEEE International Conference on Field Programmable Technology.

[4]  G. Schirner,et al.  Fast and Accurate Transaction Level Models using Result Oriented Modeling , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

[5]  David Tarditi,et al.  Accelerator: using data parallelism to program GPUs for general-purpose uses , 2006, ASPLOS XII.

[6]  L. Anghel,et al.  CNTFET basics and simulation , 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..

[7]  Pierre G. Paulin,et al.  An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures , 2006, 2006 IFIP International Conference on Very Large Scale Integration.

[8]  R. Mirandola,et al.  Efficient Performance Models in Component-Based Software Engineering , 2006, 32nd EUROMICRO Conference on Software Engineering and Advanced Applications (EUROMICRO'06).

[9]  Oskar Mencer,et al.  Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description , 2006, 2006 International Conference on Field Programmable Logic and Applications.

[10]  Sandeep K. Shukla,et al.  A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design , 2006, Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings..

[11]  Shinobu Fujita,et al.  Modeling and analysis of circuit performance of ballistic CNFET , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[12]  Elvinia Riccobene,et al.  A model-driven design environment for embedded systems , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[13]  Oliver Bringmann,et al.  GreenBus - a generic interconnect fabric for transaction level modelling , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[14]  Zhaohui Du,et al.  Data and computation transformations for Brook streaming applications on multiprocessors , 2006, International Symposium on Code Generation and Optimization (CGO'06).

[15]  Rolf Kraemer,et al.  A wireless communication platform for long-term health monitoring , 2006, Fourth Annual IEEE International Conference on Pervasive Computing and Communications Workshops (PERCOMW'06).

[16]  Wolfgang Rosenstiel,et al.  Automatic SystemC design configuration for a faster evaluation of different partitioning alternatives , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[17]  Gunar Schirner,et al.  Quantitative Analysis of Transaction Level Models for the AMBA Bus , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[18]  Jeffrey H. Lang,et al.  A variable-capacitance vibration-to-electric energy harvester , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

[19]  Andy D. Pimentel,et al.  A systematic approach to exploring embedded system architectures at multiple abstraction levels , 2006, IEEE Transactions on Computers.

[20]  Peng Yang,et al.  PowerViP: SoC power estimation framework at transaction level , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[21]  F. Singhoff,et al.  Scheduling and memory requirements analysis with AADL , 2005, SIGAda Conference.

[22]  Mendel Rosenblum,et al.  Stream programming on general-purpose processors , 2005, 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05).

[23]  Jan Madsen,et al.  ARTS: a system-level framework for modeling MPSoC components and analysis of their causality , 2005, 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems.

[24]  Kurt Keutzer,et al.  An automated exploration framework for FPGA-based soft multiprocessor systems , 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).

[25]  Diana Marculescu,et al.  System level power and performance modeling of GALS point-to-point communication interfaces , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

[26]  Dorina C. Petriu,et al.  From UML to LQN by XML algebra-based model transformations , 2005, WOSP '05.

[27]  Andrew S. Cassidy,et al.  High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors , 2005, TODE.

[28]  Christoph Grimm,et al.  Extending SystemC to support mixed discrete-continuous system modeling and simulation , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[29]  Eric Senn,et al.  High-level synthesis under I/O timing and memory constraints , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[30]  Massimo Conti,et al.  System level analysis of the Bluetooth standard , 2005, Design, Automation and Test in Europe.

[31]  Stephen A. Edwards,et al.  The challenges of hardware synthesis from C-like languages , 2005, Design, Automation and Test in Europe.

[32]  Aloysius K. Mok,et al.  Timed RTOS modeling for embedded system design , 2005, 11th IEEE Real Time and Embedded Technology and Applications Symposium.

[33]  J.-P. Soininen,et al.  Evaluation of platform architecture performance using abstract instruction-level workload models , 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

[34]  Gabor C. Temes,et al.  Understanding Delta-Sigma Data Converters , 2004 .

[35]  Jean Bézivin,et al.  On the Need for Megamodels , 2004, OOPSLA 2004.

[36]  L. Blazevic,et al.  HW accelerated ultra wide band MAC protocol using SDL and SystemC , 2004, Proceedings. 2004 IEEE Radio and Wireless Conference (IEEE Cat. No.04TH8746).

[37]  Jari Kreku,et al.  Workload simulation method for evaluation of application feasibility in a mobile multiprocessor platform , 2004, Euromicro Symposium on Digital System Design, 2004. DSD 2004..

[38]  Daniel J. Sorin,et al.  Semi-empirical SPICE models for carbon nanotube FET logic , 2004, 4th IEEE Conference on Nanotechnology, 2004..

[39]  Pat Hanrahan,et al.  Brook for GPUs: stream computing on graphics hardware , 2004, ACM Trans. Graph..

[40]  Sandeep K. Shukla,et al.  SystemC Kernel extensions for heterogeneous system modeling - a framework for multi-MoC modeling and simulation , 2004 .

[41]  Kevin Skadron,et al.  Compact thermal modeling for temperature-aware design , 2004, Proceedings. 41st Design Automation Conference, 2004..

[42]  Jean Paul Calvez,et al.  A generic RTOS model for real-time systems simulation with systemC , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[43]  Karsten Haug,et al.  Evaluation of an object-oriented hardware design methodology for automotive applications , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[44]  Eric Senn,et al.  Functional level power analysis: an efficient approach for modeling the power consumption of complex processors , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[45]  Jung Ho Ahn,et al.  Merrimac: Supercomputing with Streams , 2003, ACM/IEEE SC 2003 Conference (SC'03).

[46]  Margus Veanes,et al.  Validating use-cases with the AsmL test tool , 2003, Third International Conference on Quality Software, 2003. Proceedings..

[47]  Daniel Gajski,et al.  Transaction level modeling: an overview , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[48]  Mark S. Lundstrom,et al.  Theory of ballistic nanotransistors , 2003 .

[49]  Frank Budinsky,et al.  Eclipse Modeling Framework , 2003 .

[50]  Edward A. Lee,et al.  Actor-Oriented Design of Embedded Hardware and Software Systems , 2003, J. Circuits Syst. Comput..

[51]  C. Turchetti,et al.  Transaction-level models for AMBA bus architecture using SystemC 2.0 , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[52]  Andreas Gerstlauer,et al.  RTOS modeling for system level design , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[53]  F. Herrera,et al.  Systematic embedded software generation from SystemC , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[54]  Stephen A. Edwards,et al.  The synchronous languages 12 years later , 2003, Proc. IEEE.

[55]  Pao-Ann Hsiung,et al.  Synthesis of real-time embedded software by timed quasi-static scheduling , 2003, 16th International Conference on VLSI Design, 2003. Proceedings..

[56]  Henry Hoffmann,et al.  A stream compiler for communication-exposed architectures , 2002, ASPLOS X.

[57]  Luciano Lavagno,et al.  Quasi-static scheduling of independent tasks for reactive systems , 2002, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[58]  D.Y. Montuno,et al.  A comparison of active queue management algorithms using the OPNET Modeler , 2002, IEEE Communications Magazine.

[59]  Thorsten Grotker,et al.  System Design with SystemC , 2002 .

[60]  U. Deiters.  Calculation of densities from cubic equations of state , 2002 .

[61]  Donal Heffernan,et al.  TTCAN: a new time-triggered controller area network , 2002, Microprocess. Microsystems.

[62]  P. McEuen,et al.  Single-walled carbon nanotube electronics , 2002 .

[63]  S. Wind,et al.  Carbon nanotube electronics , 2002, Digest. International Electron Devices Meeting,.

[64]  Robert F. Stärk,et al.  A Logic for Abstract State Machines , 2001, J. Univers. Comput. Sci..

[65]  Gerhard Fettweis,et al.  MATLAB based codesign framework for wireless broadband communication DSPs , 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

[66]  P. Febvre,et al.  On-chip high-frequency diagnostic of RSFQ logic cells , 2001 .

[67]  Stephen A. Edwards,et al.  Languages for Digital Embedded Systems , 2000 .

[68]  N. Lugil,et al.  A W-CDMA transceiver core and a simulation environment for 3GPP terminals , 2000, 2000 IEEE Sixth International Symposium on Spread Spectrum Techniques and Applications. ISSTA 2000. Proceedings (Cat. No.00TH8536).

[69]  Rainer Leupers,et al.  Software synthesis and code generation for signal processing systems , 2000 .

[70]  Raffaela Mirandola,et al.  Deriving a queueing network based performance model from UML diagrams , 2000, WOSP '00.

[71]  Michel Dagenais,et al.  Measuring and Characterizing System Behavior Using Kernel-Level Event Logging , 2000, USENIX Annual Technical Conference, General Track.

[72]  Mahmut T. Kandemir,et al.  The design and use of simplePower: a cycle-accurate energy estimation tool , 2000, Proceedings 37th Design Automation Conference.

[73]  Jürgen Teich,et al.  FunState-an internal design representation for codesign , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[74]  P. van der Wolf,et al.  A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems , 1999, 1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461).

[75]  M. Sgroi,et al.  Synthesis of embedded software using free-choice Petri nets , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

[76]  Edward A. Lee,et al.  Synthesis of Embedded Software from Synchronous Dataflow Specifications , 1999, J. VLSI Signal Process..

[77]  Jürgen Teich,et al.  Scheduling hardware/software systems using symbolic techniques , 1999, Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450).

[78]  Klaus Buchenrieder,et al.  Prototyping Networked Embedded Systems , 1999, Computer.

[79]  Wolfgang Nebel,et al.  Case study: system model of crane and embedded control , 1999, DATE.

[80]  Xin Wang,et al.  Deriving Software Performance Models from Architectural Patterns by Graph Transformations , 1998, TAGT.

[81]  Kees G. W. Goossens,et al.  The Petrol approach to high-level power estimation , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[82]  Luciano Lavagno,et al.  Hardware-Software Co-Design of Embedded Systems , 1997 .

[83]  Robert Stephens,et al.  A survey of stream processing , 1997, Acta Informatica.

[84]  G. Borriello,et al.  Dynamic Communication Models in Embedded System Co-Simulation , 1997, Proceedings of the 34th Design Automation Conference.

[85]  Gerard J. Holzmann,et al.  The Model Checker SPIN , 1997, IEEE Trans. Software Eng..

[86]  Anoop Gupta,et al.  Complete computer system simulation: the SimOS approach , 1995, IEEE Parallel Distributed Technol. Syst. Appl..

[87]  E.A. Lee,et al.  A comparison of synchronous and cycle-static dataflow , 1995, Conference Record of The Twenty-Ninth Asilomar Conference on Signals, Systems and Computers.

[88]  Andrew Wolfe,et al.  Power Analysis Of Embedded Software: A First Step Towards Software Power Minimization , 1994, IEEE/ACM International Conference on Computer-Aided Design.

[89]  Dennis Ritchie,et al.  The development of the C language , 1993, HOPL-II.

[90]  Gérard Berry,et al.  The Esterel Synchronous Programming Language: Design, Semantics, Implementation , 1992, Sci. Comput. Program..

[91]  V. Semenov,et al.  RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.

[92]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.

[93]  Connie U. Smith,et al.  The Evolution of Software Performance Engineering: A Survey , 1986, FJCC.

[94]  Albert Wilansky,et al.  Between T1 and T2 , 1967 .

[95]  D. Brooks,et al.  RETROSPECTIVE: Wattch: A Framework for Architectural-level Power Analysis and Optimizations , 2023 .

[96]  A. Prakash,et al.  Symbolic Model Checking , 2016, Encyclopedia of Algorithms.

[97]  Thomas Vergnaud,et al.  Modélisation des systèmes temps-réel répartis embarqués pour la génération automatique d'applications formellement vérifiées , 2006 .

[98]  Wolfgang Nebel,et al.  The Quiny SystemC Front End: Self-Synthesising Designs , 2006, FDL.

[99]  Martin Radetzki,et al.  SystemC TLM Transaction Modelling and Dispatch for Active Object , 2006, FDL.

[100]  E. Senn,et al.  SoftExplorer: Estimating and Optimizing the Power and Energy Consumption of a C Program for DSP Applications , 2005, EURASIP J. Adv. Signal Process..

[101]  Wolfgang Rosenstiel,et al.  SystemC: methodologies and applications , 2003 .

[102]  John F. Bulzacchelli,et al.  A superconducting bandpass delta-sigma modulator for direct analog-to-digital conversion of microwave radio , 2003 .

[103]  Wolfgang Nebel,et al.  Object oriented hardware design and synthesis based on systemC 2.0 , 2003 .

[104]  Frank Oppenheimer,et al.  Aspects Of Object Oriented Hardware Modelling With SystemC-Plus , 2002 .

[105]  Frank Oppenheimer,et al.  SystemC Object-Oriented Extensions and Synthesis Features , 2002 .

[106]  Alan Burns,et al.  Concurrency in ADA , 1995 .

[107]  Giovanni De Micheli,et al.  Synthesis and Optimization of Digital Circuits , 1994 .

[108]  R. Bryant.  Graph-based Algorithm for Boolean Function Manipulation , 1989 .

[109]  Begnaud Francis Hildebrand,et al.  Introduction to numerical analysis: 2nd edition , 1987 .

[110]  Ira Krepchin,et al.  Texas Instruments Inc. , 1963, Nature.

[111]  Akademii︠a︡ medit︠s︡inskikh nauk Sssr.  Journal of physics , 1939 .