The issue of error sensitivity in neural networks

The problem of sensitivity to errors in artificial neural networks is discussed here in behavioral terms, i.e. considering an abstract model of the network and the errors that can affect a neuron's computation. Feed-forward multi-layered networks are considered; the performance taken into account with respect to error sensitivity is their classification capacity. The final aim is evaluation of the probability that a single neuron's error will affect both its own classification capacity and the whole network's classification capacity. A geometrical representation of the neural computation is adopted as the basis for such evaluation. Probability of error propagation is evaluated with respect to the single neuron's output as well as to the complete network's output. The information derived as used to evaluate, for a specific digital network architecture, the must critical sections of the implementation as far as reliability is concerned and thus to point out candidates for ad-hoc fault-tolerance policies.<<ETX>>

[1]  R. Palmer,et al.  Introduction to the theory of neural computation , 1994, The advanced book program.

[2]  Bernard Widrow,et al.  Sensitivity of feedforward neural networks to weight errors , 1990, IEEE Trans. Neural Networks.

[3]  Vincenzo Piuri,et al.  Fault tolerance in neural networks: theoretical analysis and simulation results , 1991, [1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications.

[4]  Cesare Alippi,et al.  Setting and validating precision requirements in the digital VLSI implementation of a neural defect-identifier for machined objects , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[5]  Cesare Alippi Asymptotic insensitivity to weights perturbations in back-propagation classifiers , 1993, Proceedings of 1993 International Conference on Neural Networks (IJCNN-93-Nagoya, Japan).

[6]  Vincenzo Piuri,et al.  Sensitivity to errors in artificial neural networks: a behavioral approach , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[7]  Chalapathy Neti,et al.  Maximally fault tolerant neural networks , 1992, IEEE Trans. Neural Networks.

[8]  Renato Stefanelli,et al.  Mapping neural nets onto a massively parallel architecture: a defect-tolerance solution , 1991, Proc. IEEE.

[9]  Wojciech Maly,et al.  Limitations to the size of single-chip electronic neural networks , 1991, 1991 Proceedings, International Conference on Wafer Scale Integration.

[10]  Christian Lehmann,et al.  A VLSI Implementation of a Generic Systolic Synaptic Building Block for Neural Networks , 1991 .

[11]  Barry W. Johnson,et al.  The Analysis of the Faulty Behavior of Synchronous Neural Networks , 1991, IEEE Trans. Computers.

[12]  Vincenzo Piuri,et al.  Arithmetic codes for concurrent error detection in artificial neural networks: the case of AN+B codes , 1992, Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems.