Synthesis Flow for Cell-Based Adiabatic Quantum-Flux-Parametron Structural Circuit Generation With HDL Back-End Verification

Adiabatic quantum-flux-parametron (AQFP) logic is a very energy-efficient platform to perform computing with superconductivity. In AQFP logic, dynamic energy dissipation can be drastically reduced due to the adiabatic switching operations using ac excitation currents. During the past few years, the AQFP logic family has been investigated and implemented into various operational circuits. Experimental results prove the robustness of building large-scale integrated AQFP circuits. In this paper, an AQFP very large scale integration (VLSI) design flow is introduced and detailed with a 16-b decoder as an example circuit. By including logic synthesis and automatic routing tools, this AQFP VLSI design flow is capable of converting a high-level description of a system into a physical layout. Analysis suggests that a reduction of more than 40% in circuit area and a much higher design efficiency can be obtained, compared to a previous design done manually.