Arithmetic image coding/decoding architecture based on a cache memory

We present a new arithmetic coding algorithm based on a small cache memory. The complexity of multi level arithmetic coding has been reduced by restricting the operations to those symbols stored in the cache. We analyze the best organisation of the cache, trying out different configurations, associativity and replacement algorithms. Finally, a new architecture for encoding and decoding has been proposed, which reduces hardware requirements and cycle length. Moreover, we solve other implementation details, introduce pipelining and obtain good compression ratios.

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