Device optimization onpartially-depleted silicon-on-insulator (PDSOI)CMOS issystematically performed interms ofcircuit switching speed andpowerconsumption. Theeffects ofseveral keyfactors, such asthreshold voltage (Vth), pre-amorphization implantation (PAI), and silicon filmthickness (Tsi), arefully investigated andoptimized to achieve optimal ring-oscillator performance. We foundthatwelldesigned PAIimproves circuit delay vs.leakage characteristics, while decreasing Tsialso reduces thepropagation delay. We thenpresent the optimized AC performance foravariety ofcircuits, aswellastheDC performance, theSRAM characteristics, andthereliability assessment.