A method for linearization of a multibit delta-sigma (/spl Delta//spl Sigma/) A/D converter

Multibit delta-sigma ADCs, when compared to single-bit delta-sigma converters, have the potential to achieve larger dynamic ranges and higher sampling rates. However, because multibit converters are sensitive to nonlinearity in the internal converter in the modulator, this potential is rarely exploited. This nonlinearity can be compensated for digitally by correcting the output codes from the converter, provided you can model the erroneous behavior of the modulator. This paper presents a new method for characterizing nonlinearities within a multibit delta-sigma ADC. The method is suitable for self-calibration.