Non-volatile translation layer for PCM+NAND in wearable devices

Recently, there have been approaches of using phase change memory (PCM) for the wearable devices. PCM can prolong the lifetime of the wearable devices, because it can endure approximately 108 writes per cell. Unfortunately, because previous well-known software translation algorithms were designed to use DRAM as the main memory, they execute frequent write operations on the PCM. As a solution, this paper proposes a software layer called “load-balancing flash translation layer (Load-FTL)” that enhances the performance of the PCM-based wearable devices by efficiently identifying the hot data and managing them in the PCM. Furthermore, Load-FTL prolongs the durability of the PCM using a window-based wear-leveling algorithm.

[1]  Tae-Sun Chung,et al.  FTL algorithms for NAND-type flash memories , 2011, Des. Autom. Embed. Syst..

[2]  Dong Li,et al.  PCM-Based Durable Write Cache for Fast Disk I/O , 2012, 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems.

[3]  Jagan Singh Meena,et al.  Overview of emerging nonvolatile memory technologies , 2014, Nanoscale Research Letters.

[4]  Hyung Gyu Lee,et al.  A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems , 2008, EMSOFT '08.

[5]  Zili Shao,et al.  A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[6]  Lingfang Zeng,et al.  A Popularity-Aware Buffer Management to Improve Buffer Hit Ratio and Write Sequentiality for Solid-State Drive , 2013, IEEE Transactions on Magnetics.

[7]  Dae Man Han.  Fast erase algorithm using flash translation layer in NAND-type flash memory , 2011, IEEE Transactions on Consumer Electronics.

[8]  Vijayalakshmi Srinivasan,et al.  Enhancing lifetime and security of PCM-based Main Memory with Start-Gap Wear Leveling , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[9]  Gang Wu,et al.  CAR: Securing PCM Main Memory System with Cache Address Remapping , 2012, 2012 IEEE 18th International Conference on Parallel and Distributed Systems.

[10]  Zili Shao,et al.  PCM-FTL: A Write-Activity-Aware NAND Flash Memory Management Scheme for PCM-Based Embedded Systems , 2011, 2011 IEEE 32nd Real-Time Systems Symposium.

[11]  Tae-Sun Chung,et al.  Hybrid Associative Flash Translation Layer for the Performance Optimization of Chip-Level Parallel Flash Memory , 2013, TOS.

[12]  Naehyuck Chang,et al.  PTL: PCM Translation Layer , 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.