Distortion compensation for time-interleaved analog to digital converters

A common technique to achieve high sample rates for analog-to-digital converters (ADCs) is to time interleave two or more devices. A drawback of this approach is that mismatches between the devices cause distortion in the sample sequence. This distortion limits the dynamic range which may be achieved using a particular ADC. Although phase-plane compensation techniques exist to improve the dynamic range of ADCs, these techniques are ineffective for time-interleaved structures. This paper extends the existing phase-plane modeling techniques to time-interleaved architectures. The modified algorithms are tested using a 500 MSPS ADC and are shown to reduce harmonic and intermodulation distortion terms by well over 10 dB.