A unique network EDA tool to create optimized ad hoc binary to residue number system converters

To satisfy the low time to market period, modern digital circuits demand a rapid prototype design exploration, which can be achieved using space exploration tools that given a set of input constrains, generate the HDL definitions that implement the given functionality. Residue number system (RNS), a non-conventional arithmetic system, has been proposed as a viable alternative for hardware acceleration, due to it's carry free nature. Here, we present the first web accessible EDA tool that can generate custom synthesizable forward residue number binary-to-RNS converters, for a specific input bit width and a moduli base, which can be optimally selected by our tool. Our novel tool is the first one to automate the design of forward residue number system converters and simultaneously provide custom test benches to verify their correctness. The tool is available for the public, from our web server. Our synthesized circuits on Xilinx Virtex 6 FPGA XC6VLX760, operate up to 783 Mhz.

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